Displaying 20 results from an estimated 21 matches for "gk20a_timer_new".
2017 Jul 03
0
[PATCH] therm/gm200: Added
...dex 7bdc7a5a..39fdafed 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -2043,6 +2043,7 @@ nv120_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gm107_pmu_new,
+ .therm = gm200_therm_new,
.secboot = gm200_secboot_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@@ -2077,6 +2078,7 @@ nv124_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gm107_pmu_new,
+ .therm = gm200_therm_new,
.secboot = gm200_secboot_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@@ -2111,6 +2113,7 @@ nv126_chipset = {
.mxm = nv...
2016 Dec 12
2
[PATCH] drm/nouveau: fix unknown chipset for GTX 1060
...0_bus_new,
+ .devinit = gm200_devinit_new,
+ .fb = gp104_fb_new,
+ .fuse = gm107_fuse_new,
+ .gpio = gk104_gpio_new,
+ .i2c = gm200_i2c_new,
+ .ibus = gm200_ibus_new,
+ .imem = nv50_instmem_new,
+ .ltc = gp100_ltc_new,
+ .mc = gp100_mc_new,
+ .mmu = gf100_mmu_new,
+ .pci = gp100_pci_new,
+ .timer = gk20a_timer_new,
+ .top = gk104_top_new,
+ .ce[0] = gp104_ce_new,
+ .ce[1] = gp104_ce_new,
+ .ce[2] = gp104_ce_new,
+ .ce[3] = gp104_ce_new,
+ .disp = gp104_disp_new,
+ .dma = gf119_dma_new,
+ .fifo = gp100_fifo_new,
+};
+
static int
nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,...
2017 Jan 22
1
[GP107 chipset][PATCH] Recognise GP107 chipset (GTX 1050/1050ti)
...; .gpio = gk104_gpio_new,
> .i2c = gm200_i2c_new,
> .ibus = gm200_ibus_new,
> .imem = nv50_instmem_new,
> .ltc = gp100_ltc_new,
> .mc = gp100_mc_new,
> .mmu = gf100_mmu_new,
> .pci = gp100_pci_new,
> .pmu = gp102_pmu_new,
> .timer = gk20a_timer_new,
> .top = gk104_top_new,
> .ce[0] = gp102_ce_new,
> .ce[1] = gp102_ce_new,
> .ce[2] = gp102_ce_new,
> .ce[3] = gp102_ce_new,
> .disp = gp102_disp_new,
> .dma = gf119_dma_new,
> .fifo = gp100_fifo_new,
> };
>
2709a2739
> case 0...
2017 Feb 14
1
[PATCH] drm/nouveau/core: recognise GP107 chipset
...0_bus_new,
+ .devinit = gm200_devinit_new,
+ .fb = gp104_fb_new,
+ .fuse = gm107_fuse_new,
+ .gpio = gk104_gpio_new,
+ .i2c = gm200_i2c_new,
+ .ibus = gm200_ibus_new,
+ .imem = nv50_instmem_new,
+ .ltc = gp100_ltc_new,
+ .mc = gp100_mc_new,
+ .mmu = gf100_mmu_new,
+ .pci = gp100_pci_new,
+ .timer = gk20a_timer_new,
+ .top = gk104_top_new,
+ .ce[0] = gp104_ce_new,
+ .ce[1] = gp104_ce_new,
+ .ce[2] = gp104_ce_new,
+ .ce[3] = gp104_ce_new,
+ .disp = gp104_disp_new,
+ .dma = gf119_dma_new,
+ .fifo = gp100_fifo_new,
+};
+
static int
nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,...
2017 Aug 31
4
[RFC PATCH] drm/nouveau/therm: initial implementation of new gp1xx temperature sensor
...100_therm_new,
.secboot = gp102_secboot_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@@ -2332,6 +2337,7 @@ nv13b_chipset = {
.ltc = gp100_ltc_new,
.mc = gp10b_mc_new,
.mmu = gf100_mmu_new,
+ .therm = gp100_therm_new,
.secboot = gp10b_secboot_new,
.pmu = gm20b_pmu_new,
.timer = gk20a_timer_new,
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild
index 135758ba3e28..3ef1b396a946 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild
@@ -11,3 +11,4 @@ nvkm-y += nvkm/su...
2016 Dec 12
0
[PATCH] drm/nouveau: fix unknown chipset for GTX 1060
...gp104_fb_new,
> + .fuse = gm107_fuse_new,
> + .gpio = gk104_gpio_new,
> + .i2c = gm200_i2c_new,
> + .ibus = gm200_ibus_new,
> + .imem = nv50_instmem_new,
> + .ltc = gp100_ltc_new,
> + .mc = gp100_mc_new,
> + .mmu = gf100_mmu_new,
> + .pci = gp100_pci_new,
> + .timer = gk20a_timer_new,
> + .top = gk104_top_new,
> + .ce[0] = gp104_ce_new,
> + .ce[1] = gp104_ce_new,
> + .ce[2] = gp104_ce_new,
> + .ce[3] = gp104_ce_new,
> + .disp = gp104_disp_new,
> + .dma = gf119_dma_new,
> + .fifo = gp100_fifo_new,
> +};
> +
> static int
> nvkm_device_event_c...
2017 Feb 14
0
[PATCH] drm/nouveau/core: recognise GP107 chipset
....gpio = gk104_gpio_new,
> + .i2c = gm200_i2c_new,
> + .ibus = gm200_ibus_new,
> + .imem = nv50_instmem_new,
> + .ltc = gp100_ltc_new,
> + .mc = gp100_mc_new,
> + .mmu = gf100_mmu_new,
> + .pci = gp100_pci_new,
> + .timer = gk20a_timer_new,
> + .top = gk104_top_new,
> + .ce[0] = gp104_ce_new,
> + .ce[1] = gp104_ce_new,
> + .ce[2] = gp104_ce_new,
> + .ce[3] = gp104_ce_new,
> + .disp = gp104_disp_new,
> + .dma = gf119_dma_new,
> + .fifo = gp100_fifo_new,
> +};
&...
2017 Jul 03
0
[PATCH] initial support (display-only) for GP108
...gm200_devinit_new,
+ .fb = gp102_fb_new,
+ .fuse = gm107_fuse_new,
+ .gpio = gk104_gpio_new,
+ .i2c = gm200_i2c_new,
+ .ibus = gm200_ibus_new,
+ .imem = nv50_instmem_new,
+ .ltc = gp100_ltc_new,
+ .mc = gp100_mc_new,
+ .mmu = gf100_mmu_new,
+ .pci = gp100_pci_new,
+ .pmu = gp102_pmu_new,
+ .timer = gk20a_timer_new,
+ .top = gk104_top_new,
+ .ce[0] = gp102_ce_new,
+ .ce[1] = gp102_ce_new,
+ .ce[2] = gp102_ce_new,
+ .ce[3] = gp102_ce_new,
+ .disp = gp102_disp_new,
+ .dma = gf119_dma_new,
+ .fifo = gp100_fifo_new,
+};
+
+static const struct nvkm_device_chip
nv13b_chipset = {
.name = "GP10B",
.bar...
2017 Sep 01
0
[PATCH v2] drm/nouveau/therm: initial implementation of new gp1xx temperature sensor
...erm = gp100_therm_new,
.secboot = gp102_secboot_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@@ -2339,6 +2344,7 @@ nv138_chipset = {
.ltc = gp100_ltc_new,
.mc = gp100_mc_new,
.mmu = gf100_mmu_new,
+ .therm = gp100_therm_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
.timer = gk20a_timer_new,
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild
index 2bafcc1d1818..7ba56b12badd 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild
@@ -12,3 +12,4 @@ nvkm-y += nvkm/su...
2017 Nov 10
2
GP10B regression
Hello everyone,
it seems that GP10B support has regressed recently. With linux-next, I
need to modify device/base.c to set
.mmu = gp10b_mmu_new
for GP10B (makes sense - I guess this was left as gf100_mmu_new as a
typo) to probe. After that, running a trivial testcase (running a NOP
method in 3D class) fails with
[ 110.084649] nouveau 17000000.gpu: fifo: read fault at 0000011000
engine 06
2016 Jan 01
9
[PATCH v4 0/9] PCIe speed changes
overall it is for the most part the same as my older version.
I cleaned up some copyright things, so that it is more like the others.
Also I moved the print about the max speed supported into preinit and did
some other minor cleanups in the 3rd commit.
Happy testing (and performance for prime offloading setups)
Karol Herbst (9):
pci: add gk104 variant
pci: add gf106 variant
pci: implement
2015 Oct 12
12
[PATCH 0/9] PCIe speed changes
this patch series implements PCIe speed changes for Tesla and newer.
The Kepler and Fermi bits are tested on my cards at home.
Karol Herbst (9):
pci: add gk104 variant
pci: add gf106 variant
pci: implement generic code for PCIe speed change
pci: implement pcie speed change for tesla
pci: implement pcie speed change on Fermi
pci: implement PCIe speed change for kepler+
bios/perf:
2017 Nov 21
2
GP10B regression
...e/device/base.c
@@ -2369,7 +2369,7 @@ nv13b_chipset = {
.imem = gk20a_instmem_new,
.ltc = gp100_ltc_new,
.mc = gp10b_mc_new,
- .mmu = gf100_mmu_new,
+ .mmu = gp10b_mmu_new,
.secboot = gp10b_secboot_new,
.pmu = gm20b_pmu_new,
.timer = gk20a_timer_new,
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c
index 3dcc6bddb32f..470a4fadc165 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c
@@ -33,7 +33,7 @@ gp10b_vm...
2015 Oct 13
12
[PATCH v2 0/9] PCIEs speed change
overall the same as the old stuff, but with better namings and tirivialy
improved code here and there
Karol Herbst (9):
pci: add gk104 variant
pci: add gf106 variant
pci: implement generic code for PCIe speed change
pci: implement pcie speed change for tesla
pci: implement pcie speed change on Fermi
pci: implement PCIe speed change for kepler+
bios/perf: parse the pci speed from the
2019 Nov 02
13
[PATCH v2 0/9] drm/nouveau: Various fixes for GP10B
From: Thierry Reding <treding at nvidia.com>
Hi Ben,
here's a revised subset of the patches I had sent out a couple of weeks
ago. I've reworked the BAR2 accesses in the way that you had suggested,
which at least for GP10B turned out to be fairly trivial to do. I have
not looked in detail at this for GV11B yet, but a cursory look showed
that BAR2 is accessed in more places, so the
2019 Dec 09
11
[PATCH v3 0/9] drm/nouveau: Various fixes for GP10B
From: Thierry Reding <treding at nvidia.com>
Hi Ben,
here's a revised subset of the patches I had sent out a couple of weeks
ago. I've reworked the BAR2 accesses in the way that you had suggested,
which at least for GP10B turned out to be fairly trivial to do. I have
not looked in detail at this for GV11B yet, but a cursory look showed
that BAR2 is accessed in more places, so the
2016 Mar 11
16
[PATCH 00/16] clk/gm20b: add basic driver
This series does some refactoring in the GK20A's volt and clk drivers
(fixing a few things while we are at it) to let GM20B benefit from the
GK20A's logic with which it is compatible.
GM20B is capable of more sophisticated (and power-efficient) reclocking
which will follow later. Even after this more fancy reclocking is merged,
the present logic will remain used in the lowest speedo of
2019 Sep 16
15
[PATCH 00/11] drm/nouveau: Enable GP10B by default
From: Thierry Reding <treding at nvidia.com>
Hi,
the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why
exactly is not clear, but there are slight differences between the SKUs
that were tested. It turns out that the biggest issue is that on some
devices (e.g. the one that I have), pulsing the GPU reset twice as is
done in the current code (once as part of the power-ungate
2016 Dec 13
15
[PATCH v2 0/15] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some
fixes, I now submit it as its own series to make it easier to review (and also
because rebasing secure boot on top of this takes time and I don't want to do
it until this is validated!).
This series attempts to factorize the duplicate falcon-related code into a
single library, using the existing nvkm_falcon
2017 Mar 29
15
[PATCH 00/15] Support for GP10B chipset
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for
its base engines after reworking secboot a bit to accomodate its calling
convention better.
This patchset has been tested rendering simple off-screen buffers using Mesa
and yielded the expected result.
Alexandre Courbot (15):
secboot: allow to boot multiple falcons
secboot: pass instance to LS firmware loaders
secboot: