Displaying 2 results from an estimated 2 matches for "gk20a_pmu_enable_irq".
2015 Apr 13
3
[PATCH v4] pmu/gk20a: PMU boot support
...+ if (nv_wait(priv, 0x0010a10c, 0x00000006, 0x00000000))
+ return 0;
+ nv_mask(pmc, 0x00000200, 0x2000, 0x00000000);
+ nv_error(priv, "Falcon mem scrubbing timeout\n");
+ return -ETIMEDOUT;
+ } else {
+ nv_mask(pmc, 0x00000200, 0x2000, 0x00000000);
+ return 0;
+ }
+}
+static void
+gk20a_pmu_enable_irq(struct gk20a_pmu_priv *priv, struct nvkm_mc *pmc, bool enable)
+{
+ if (enable) {
+ nv_debug(priv, "enable pmu irq\n");
+ nv_wr32(priv, 0x0010a010, 0xff);
+ nv_mask(pmc, 0x00000640, 0x1000000, 0x1000000);
+ nv_mask(pmc, 0x00000644, 0x1000000, 0x1000000);
+ } else {
+ nv_debug(priv, &...
2015 Apr 30
2
[PATCH v4] pmu/gk20a: PMU boot support
...nv_error(priv, "Falcon mem scrubbing timeout\n");
>> + return -ETIMEDOUT;
>> + } else {
>> + nv_mask(pmc, 0x00000200, 0x2000, 0x00000000);
>> + return 0;
>> + }
>> +}
>> +static void
>> +gk20a_pmu_enable_irq(struct gk20a_pmu_priv *priv, struct nvkm_mc *pmc,
>> bool enable)
>> +{
>> + if (enable) {
>> + nv_debug(priv, "enable pmu irq\n");
>> + nv_wr32(priv, 0x0010a010, 0xff);
>> + nv_mask(pmc, 0x00000640, 0x100...