search for: gk20a_mc_new

...0_iccsense_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf100_mc_new, @@ -1871,6 +1885,7 @@ nv106_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, @@ -1907,6 +1922,7 @@ nv108_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, @@ -1943,6 +1959,7 @@ nv117_chipset = { .gpio = gk104_gpio_new, .i2c =...

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

...0_iccsense_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gf100_mc_new, @@ -1871,6 +1885,7 @@ nv106_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, @@ -1907,6 +1922,7 @@ nv108_chipset = { .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, .mc = gk20a_mc_new, @@ -1943,6 +1959,7 @@ nv117_chipset = { .gpio = gk104_gpio_new, .i2c =...

overall it is for the most part the same as my older version. I cleaned up some copyright things, so that it is more like the others. Also I moved the print about the max speed supported into preinit and did some other minor cleanups in the 3rd commit. Happy testing (and performance for prime offloading setups) Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement

The INA3221 is usually found on mid and high end kepler+ gpus Marins Patch implements the new iccsense subdev and all needed bits for the INA3221 power sensor. My Patch implements the hwmon power1 interface to expose the current power consumption through hwmon (and can be read out via sysfs or the sensors tool) Please test these patches for Fermi+ GPUs, that nothing gets messed up and works as

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

This is a complete rework from the last version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards, but only the INA3221 bits are tested so far.

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

this patch series implements PCIe speed changes for Tesla and newer. The Kepler and Fermi bits are tested on my cards at home. Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf:

...lude/nvkm/subdev/mc.h index e68ba636741b..58f10890c3b6 100644 --- a/drm/nouveau/include/nvkm/subdev/mc.h +++ b/drm/nouveau/include/nvkm/subdev/mc.h @@ -29,4 +29,5 @@ int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **); int gk104_mc_new(struct nvkm_device *, int, struct nvkm_mc **); int gk20a_mc_new(struct nvkm_device *, int, struct nvkm_mc **); int gp100_mc_new(struct nvkm_device *, int, struct nvkm_mc **); +int gp10b_mc_new(struct nvkm_device *, int, struct nvkm_mc **); #endif diff --git a/drm/nouveau/nvkm/subdev/mc/Kbuild b/drm/nouveau/nvkm/subdev/mc/Kbuild index 12943f92c206..2befbe36dc2...

overall the same as the old stuff, but with better namings and tirivialy improved code here and there Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf: parse the pci speed from the

This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot:

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,