search for: gk20a_instobj_iommu

...}; #define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory) @@ -68,7 +65,6 @@ struct gk20a_instobj { struct gk20a_instobj_dma { struct gk20a_instobj base; - u32 *cpuaddr; dma_addr_t handle; struct nvkm_mm_node r; }; @@ -81,6 +77,11 @@ struct gk20a_instobj_dma { struct gk20a_instobj_iommu { struct gk20a_instobj base; + /* to link into gk20a_instmem::vaddr_lru */ + struct list_head vaddr_node; + /* how many clients are using vaddr? */ + u32 use_cpt; + /* will point to the higher half of pages */ dma_addr_t *dma_addrs; /* array of base.mem->size pages (+ dma_addr_ts) */ @...

...gk20a_instobj, memory) > > @@ -68,7 +65,6 @@ struct gk20a_instobj { > struct gk20a_instobj_dma { > struct gk20a_instobj base; > > - u32 *cpuaddr; > dma_addr_t handle; > struct nvkm_mm_node r; > }; > @@ -81,6 +77,11 @@ struct gk20a_instobj_dma { > struct gk20a_instobj_iommu { > struct gk20a_instobj base; > > + /* to link into gk20a_instmem::vaddr_lru */ > + struct list_head vaddr_node; > + /* how many clients are using vaddr? */ > + u32 use_cpt; > + > /* will point to the higher half of pages */ > dma_addr_t *dma_addrs; > /* arr...

...7 @@ gk20a_instobj_acquire_iommu(struct nvkm_memory *memory) out: node->use_cpt++; - spin_unlock_irqrestore(&imem->lock, flags); + mutex_unlock(&imem->lock); return node->base.vaddr; } @@ -239,9 +238,8 @@ gk20a_instobj_release_iommu(struct nvkm_memory *memory) struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory); struct gk20a_instmem *imem = node->base.imem; struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; - unsigned long flags; - spin_lock_irqsave(&imem->lock, flags); + mutex_lock(&imem->lock); /* we should at least have one user to...

...gt;> node->use_cpt++; >> - spin_unlock_irqrestore(&imem->lock, flags); >> + mutex_unlock(&imem->lock); >> >> return node->base.vaddr; >> } >> @@ -239,9 +238,8 @@ gk20a_instobj_release_iommu(struct nvkm_memory *memory) >> struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory); >> struct gk20a_instmem *imem = node->base.imem; >> struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; >> - unsigned long flags; >> >> - spin_lock_irqsave(&imem->lock, flags); >> + mutex_lock(&imem-&...

...); + u64 addr = ~0ULL; + + if (gk20a_instobj_acquire_dma(&iobj->base.memory)) + addr = gk20a_instobj_addr(&iobj->base.memory); + + gk20a_instobj_release_dma(&iobj->base.memory); + + return addr; +} + +static u64 +gk20a_instobj_bar2_iommu(struct nvkm_memory *memory) +{ + struct gk20a_instobj_iommu *iobj = gk20a_instobj_iommu(memory); + u64 addr = ~0ULL; + + if (gk20a_instobj_acquire_iommu(&iobj->base.memory)) + addr = gk20a_instobj_addr(&iobj->base.memory); + + gk20a_instobj_release_iommu(&iobj->base.memory); + + return addr; +} + static u32 gk20a_instobj_rd32(struct...

...y *memory) > > out: > node->use_cpt++; > - spin_unlock_irqrestore(&imem->lock, flags); > + mutex_unlock(&imem->lock); > > return node->base.vaddr; > } > @@ -239,9 +238,8 @@ gk20a_instobj_release_iommu(struct nvkm_memory *memory) > struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory); > struct gk20a_instmem *imem = node->base.imem; > struct nvkm_ltc *ltc = imem->base.subdev.device->ltc; > - unsigned long flags; > > - spin_lock_irqsave(&imem->lock, flags); > + mutex_lock(&imem->lock); > >...

From: Thierry Reding <treding at nvidia.com> Hi Ben, I messed up the ordering of patches in my tree a bit, so these two fixes got separated from the others. I don't consider these particularily urgent because the crash that the first one fixes only happens on gp10b which we don't enable by default yet and the second patch fixes a crash that only happens on module unload (or driver

...em _mem; +}; + +/* + * Used for objects allocated using the DMA API + */ +struct gk20a_instobj_dma { + struct gk20a_instobj_priv base; + void *cpuaddr; dma_addr_t handle; struct dma_attrs attrs; struct nvkm_mm_node r; }; +/* + * Used for objects flattened using the IOMMU API + */ +struct gk20a_instobj_iommu { + struct gk20a_instobj_priv base; + + /* array of base.mem->size pages */ + struct page *pages[]; +}; + struct gk20a_instmem_priv { struct nvkm_instmem base; spinlock_t lock; u64 addr; + + /* Only used if IOMMU if present */ + struct mutex *mm_mutex; + struct nvkm_mm *mm; + struct iommu...

...; struct gk20a_instmem *imem; /* CPU mapping */ u32 *vaddr; }; -#define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory) +#define gk20a_instobj(p) container_of((p), struct gk20a_instobj, base.memory) /* * Used for objects allocated using the DMA API @@ -148,7 +148,7 @@ gk20a_instobj_iommu_recycle_vaddr(struct gk20a_instobj_iommu *obj) list_del(&obj->vaddr_node); vunmap(obj->base.vaddr); obj->base.vaddr = NULL; - imem->vaddr_use -= nvkm_memory_size(&obj->base.memory); + imem->vaddr_use -= nvkm_memory_size(&obj->base.base.memory); nvkm_debug(&a...

...pping */ > u32 *vaddr; > }; > -#define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory) > +#define gk20a_instobj(p) container_of((p), struct gk20a_instobj, base.memory) > > /* > * Used for objects allocated using the DMA API > @@ -148,7 +148,7 @@ gk20a_instobj_iommu_recycle_vaddr(struct gk20a_instobj_iommu *obj) > list_del(&obj->vaddr_node); > vunmap(obj->base.vaddr); > obj->base.vaddr = NULL; > - imem->vaddr_use -= nvkm_memory_size(&obj->base.memory); > + imem->vaddr_use -= nvkm_memory_size(&obj->base.b...

Changes since v3: - Use a single dma_attr for all DMA-API allocations in instmem instead of one per allocation - Use device.info.ram_size instead of pfb->ram to check whether VRAM is present outside of nvkm Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into

Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to, and can trick

A series I have waited too long to submit, and the recent refactoring made me pay the price of my perfectionism, so here are the features that are at least completed Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to,

Thanks Ilia for the v2 review! Here is the v3 of this IOMMU support for GK20A series. Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove