Displaying 16 results from an estimated 16 matches for "giesen".
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giessen
2012 Oct 14
6
[Bug 1963] IPQoS not honoured
https://bugzilla.mindrot.org/show_bug.cgi?id=1963
--- Comment #5 from martin f. krafft <bugzilla.mindrot.org at pobox.madduck.net> ---
With reference to http://bugs.debian.org/650512, which I just reopened,
I am sorry to say that the bug persists in OpenSSH 6.0.
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2010 Mar 10
35
[Bug 1733] New: Enhance support for QoS (ToS) by supporting DSCP/CS and adding option
https://bugzilla.mindrot.org/show_bug.cgi?id=1733
Summary: Enhance support for QoS (ToS) by supporting DSCP/CS
and adding option
Product: Portable OpenSSH
Version: 5.4p1
Platform: All
OS/Version: Linux
Status: NEW
Severity: enhancement
Priority: P2
Component: ssh
AssignedTo:
2007 Sep 25
1
Configure one call per line on Cisco 7941/7961
Anyone aware of how to configure one call per line on a Cisco
7941/7961? The default behaviour is to have two calls per line button,
and this is confusing for some of my users so I'd like to be able to
have the 2nd call ring the second line button, rather than being
shared with the first. I'm hoping this is something that is
configurable in the XML or on the phone UI.
Thanks
Gary
2006 Nov 14
1
Broken Call Screening
Sorry for the crosspost (this was also posted to
asterisk-at-uc-dot-org) but I haven't got a response.
I have a cell phone added to a queue as a local extension (member =>
Local/299). I want the cell phone to be able to reject calls to the
queue without the person sitting in the queue being hung up on, etc.
The way my dialplan is set up, the person hits 1 to answer the call
and any other
2018 Nov 09
3
Proposed new min and max intrinsics
On Thu, Nov 8, 2018 at 11:35 PM Fabian Giesen via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> What is so complicated about these? Shouldn't they just correspond to
> two compares + selects?
>
> To give a concrete example, x86 MIN[SP][SD] and MAX[SP][SD],
> respectively, correspond exactly to
>
> MIN*: sel...
2018 Jul 02
2
Rotates, once again
On 7/2/2018 3:16 PM, Sanjay Patel wrote:
> I also agree that the per-element rotate for vectors is what we want for
> this intrinsic.
>
> So I have this so far:
>
> declare i32 @llvm.catshift.i32(i32 %a, i32 %b, i32 %shift_amount)
> declare <2 x i32> @llvm.catshift.v2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %shift_amount)
>
> For
2001 Aug 26
4
On the "broken" .WAV files issue
...ructure definitions and corresponding remarks from MSDN below
(those are copy&pasted and I use outlook express, so it *may* contain
fancy tags or something like that - I hope you can tolerate it, but
I'm too lazy to clean it up right now :)
So, keep up the excellent work on vorbis,
Fabian Giesen
------
1. WAVEFORMAT structure
The WAVEFORMAT structure describes the format of waveform-audio data. Only
format information common to all waveform-audio data formats is included in this
structure. This structure has been superseded by the WAVEFORMATEX structure.
typedef struct {
WORD wForm...
2018 May 21
0
LLVM Weekly - #229, May 21st 2018
...ar
[suggests](http://lists.llvm.org/pipermail/llvm-dev/2018-May/123310.html)
removing tools that are only useful for testing LLVM from the binary
LLVM+Clang distribution, noting tools like clang-check contribute
significantly to the installed size. Feedback is being sought in that thread.
* Fabien Giesen
[started](http://lists.llvm.org/pipermail/llvm-dev/2018-May/123292.html) a
discussion on rotate instructions, suggesting that rotate intrinsics should be
added. Sanjay Patel has some [interesting
thoughts](http://lists.llvm.org/pipermail/llvm-dev/2018-May/123383.html) on
potential criteria or infor...
2019 Sep 02
2
AVX2 codegen - question reg. FMA generation
On Mon, 2 Sep 2019 at 16:59, Roman Lebedev <lebedev.ri at gmail.com> wrote:
>
> It appears you need 'reassoc' on fmul/fadd:
> https://godbolt.org/z/nuTzx2
Thanks very much, that was it. Either that or providing
-enable-unsafe-fp-math to llc yielded FMAs. I didn't expect this since
using FMAs here instead of mul/add appears to be safer (the reverse is
unsafe).
~ Uday
2018 May 14
5
Rotates, once again
Hi everyone!
I recently ran into some interesting issues with generation of rotate instructions - the details are in the bug tracker (https://bugs.llvm.org/show_bug.cgi?id=37387 and related bugs) for those interested - and it brought up the issue of rotates in the IR again. Now this is a proposal that has been made (and been rejected) several times, but I've been told that this time round we
2018 May 15
0
Rotates, once again
...ggest I've seen.
Another potential benefit of a generic intrinsic is that it can replace
target-specific intrinsics. PowerPC and x86 have those. ARM translates
source-level target-specific intrinsics into regular IR, so that could use
the intrinsic too.
On Mon, May 14, 2018 at 2:53 AM, Fabian Giesen via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi everyone!
>
> I recently ran into some interesting issues with generation of rotate
> instructions - the details are in the bug tracker (
> https://bugs.llvm.org/show_bug.cgi?id=37387 and related bugs) for those
> inter...
2018 Nov 08
2
Proposed new min and max intrinsics
Alex,
After looking into this a bit, it looks to me like the best thing to do for
targets that do not natively support ISD::MINIMUM and ISD::MAXIMUM would be
to fall back to a libcall, since implementing these operations in terms of
existing operations is actually rather complicated. Do you think it would
make sense to add builtin functions to compiler-rt to implement these
operations, or is
2019 Oct 20
2
Matrix Multiplication not Vectorized using double pointers
Hello,
My matrix multiplication code has variables allocated via double pointers
on heap. The code is not getting vectorized. Following is the code.
int **buffer_A = (int **)malloc(vecsize * sizeof(int *));
int **buffer_B = (int **)malloc(vecsize * sizeof(int *));
for(p = 0; p < vecsize; p++)
{
buffer_A[p] = (int *)malloc(vecsize * sizeof(int));
}
for(p = 0; p < vecsize;
2018 Jul 02
2
Rotates, once again
1. I'm not sure what you mean by "full vector" here - using the same
shift distance for all lanes (as opposed to per-lane distances), or
doing a treat-the-vector-as-bag-of-bits shift that doesn't have any
internal lane boundaries? If the latter, that doesn't really help you
much with implementing a per-lane rotate.
I think the most useful generalization of a vector
2018 Aug 14
4
Why did Intel change his static branch prediction mechanism during these years?
( I don't know if it's allowed to ask such question, if not, please remind me. )
I know Intel implemented several static branch prediction mechanisms
these years:
* 80486 age: Always-not-take
* Pentium4 age: Backwards Taken/Forwards Not-Taken
* PM, Core2: Didn't use static prediction, randomly depending on
what happens to be in corresponding BTB entry , according to agner's
2010 Mar 01
0
Asterisk / Trixbox 2.6 Streaming MOH Problems
I've tried a number of solutions, but I've been unable to get Asterisk
working with streaming MOH without running into the "buffer" issue.
I've tried using various combinations madplay, mpg123, mpg321. I've
also tried streamplayer by itself, and in combination with play-fifo (
http://www.freeswitch.org/asterisk_stuff/play-fifo.c ) to try and
eliminate the issue.
For