search for: gich_lr

...nt __init setup_irq(unsigned int irq, struct irqaction *new) return rc; } -void gic_set_guest_irq(unsigned int virtual_irq, +static inline void gic_set_lr(int lr, unsigned int virtual_irq, unsigned int state, unsigned int priority) { - BUG_ON(virtual_irq > nr_lrs); - GICH[GICH_LR + virtual_irq] = state | + BUG_ON(lr > nr_lrs); + GICH[GICH_LR + lr] = state | GICH_LR_MAINTENANCE_IRQ | ((priority >> 3) << GICH_LR_PRIORITY_SHIFT) | ((virtual_irq & GICH_LR_VIRTUAL_MASK) << GICH_LR_VIRTUAL_SHIFT); } +void gic_set_guest_...

...a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index ac1f939..2d0b052 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -65,11 +65,9 @@ void gic_save_state(struct vcpu *v) { int i; - spin_lock_irq(&gic.lock); for ( i=0; i<nr_lrs; i++) v->arch.gic_lr[i] = GICH[GICH_LR + i]; v->arch.lr_mask = this_cpu(lr_mask); - spin_unlock_irq(&gic.lock); /* Disable until next VCPU scheduled */ GICH[GICH_HCR] = 0; isb(); @@ -480,7 +478,7 @@ void gic_set_guest_irq(struct vcpu *v, unsigned int virtual_irq, spin_lock_irqsave(&gic.lock, flag...

.../gic.c index 88f2d3a..9db1f57 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -677,6 +677,33 @@ static void maintenance_interrupt(int irq, void *dev_id, struct cpu_user_regs *r } } +void gic_dump_info(struct vcpu *v) +{ + int i; + struct pending_irq *p; + + printk("GICH_LRs (vcpu %d) mask=%llx\n", v->vcpu_id, v->arch.lr_mask); + if ( v == gic_running ) + { + for ( i = 0; i < nr_lrs; i++ ) + printk(" HW_LR[%d]=%x\n", i, GICH[GICH_LR + i]); + } else { + for ( i = 0; i < nr_lrs; i++ ) + printk(&qu...

..., struct cpu_user_regs *r while ((i = find_next_bit((const long unsigned int *) &eisr, 64, i)) < 64) { struct pending_irq *p; + int cpu, eoi; + + cpu = -1; + eoi = 0; spin_lock_irq(&gic.lock); lr = GICH[GICH_LR + i]; @@ -754,11 +764,23 @@ static void maintenance_interrupt(int irq, void *dev_id, struct cpu_user_regs *r p = irq_to_pending(v, virq); if ( p->desc != NULL ) { p->desc->status &= ~IRQ_INPROGRESS; - GICC[GICC_DIR] = virq; + /* Assu...

..., struct cpu_user_regs *r while ((i = find_next_bit((const long unsigned int *) &eisr, 64, i)) < 64) { struct pending_irq *p; + int cpu, eoi; + + cpu = -1; + eoi = 0; spin_lock_irq(&gic.lock); lr = GICH[GICH_LR + i]; @@ -754,11 +764,22 @@ static void maintenance_interrupt(int irq, void *dev_id, struct cpu_user_regs *r p = irq_to_pending(v, virq); if ( p->desc != NULL ) { p->desc->status &= ~IRQ_INPROGRESS; - GICC[GICC_DIR] = virq; + /* Assu...

(moving to xen-devel, xen-arm is for the older PV ARM port) On Tue, 2013-06-25 at 23:59 +0000, Eric Trudeau wrote: > Hi, I am trying to build the XEN tools for our port of XEN to our > Cortex A15-based platform. > > I am using the repo at git://xenbits.xenproject.org/xen.git to > cross-compile the tools into our rootfs. Which branch/changeset are you using? I've heard that

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See