search for: gicd_itargetsr

...g = GICD[GICD_ICFGR + irq / 16]; + edgebit = 2u << (2 * (irq % 16)); + if ( level ) + cfg &= ~edgebit; + else + cfg |= edgebit; + GICD[GICD_ICFGR + irq / 16] = cfg; + + /* Set target CPU mask (RAZ/WI on uniprocessor) */ + bytereg = (unsigned char *) (GICD + GICD_ITARGETSR); + bytereg[irq] = cpu_mask; + + /* Set priority */ + bytereg = (unsigned char *) (GICD + GICD_IPRIORITYR); + bytereg[irq] = priority; + +} + /* Program the GIC to route an interrupt */ static int gic_route_irq(unsigned int irq, bool_t level, unsigned int cpu...

...rm/gic.c index d9940ea..177560e 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -280,7 +280,7 @@ static void __init gic_dist_init(void) /* Route all global IRQs to this CPU */ for ( i = 32; i < gic.lines; i += 4 ) - GICD[GICD_ICFGR + i / 4] = cpumask; + GICD[GICD_ITARGETSR + i / 4] = cpumask; /* Default priority for global interrupts */ for ( i = 32; i < gic.lines; i += 4 ) -- 1.7.10.4

..., key); + + for ( irq = 0; irq < gic.lines; irq++ ) + { + const char *type; + int type_nr, enable, pend, active, priority, target; + struct irq_desc *desc = irq_to_desc(irq); + uint8_t *bytereg; + uint32_t wordreg; + + bytereg = (uint8_t *) (GICD + GICD_ITARGETSR); + target = bytereg[irq]; + + bytereg = (uint8_t *) (GICD + GICD_IPRIORITYR); + priority = bytereg[irq]; + + switch ( irq ) + { + case 0 ... 15: + type = "SGI"; + type_nr = irq; + target = 0x00; /* these are per-C...

Hi, This is the fifth version of this patch series. With the Versatile Express TC2, it''s possible to boot only with A7 or A15. If the user choose to boot with only A7, the CPU ID will start at 0x100. As Xen relies on it to set the logical ID and the GIC, it won''t be possible to use Xen with this use case. This patch series is divided in 3 parts: - Patch 1: prepare Xen

I''m afraid this series is rather a grab bag and it is distressingly large at this stage. With this series I can boot an Xgene board until it fails to find its SATA controller. This is a dom0 issue for which patches are pending from APM (/me nudges Anup). As well as the APM specific platform stuff there are also some generic improvements which were either necessary or useful during this

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See