search for: gf100_vm_flush

https://bugs.freedesktop.org/show_bug.cgi?id=98506 Bug ID: 98506 Summary: Pagefault in gf100_vm_flush Product: xorg Version: git Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at lists.freedesktop.org Reporter: karolherbst at...

https://bugs.freedesktop.org/show_bug.cgi?id=102192 Bug ID: 102192 Summary: Dell XPS 15 9560: PU: 1 PID: 58 at drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c:190 gf100_vm_flush+0x1b3/0x1c0 [nouveau] Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at lists.fre...

Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to

...stack trace is different every time, for example: čen 23 22:11:07 blackgate kernel: nouveau 0000:01:00.0: timeout čen 23 22:11:07 blackgate kernel: ------------[ cut here ]------------ čen 23 22:11:07 blackgate kernel: WARNING: CPU: 6 PID: 138 at drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c:190 gf100_vm_flush+0x1ab/0x1c0 [nouveau] čen 23 22:11:07 blackgate kernel: Modules linked in: xt_nat veth xfs ipt_MASQUERADE nf_nat_masquerade_ipv4 nf_conntrack_netlink nfnetlink xfrm_user xfrm_algo xt_addrtype br_netfilter bridge stp llc tun dm_thin_pool dm_persistent_data dm_bio_prison dm_bufio loop ecryptfs cbc en...

....map_sg = gf100_vm_map_sg; > + priv->base.map_iommu = gk20a_vm_map_iommu; > + priv->base.unmap_iommu = gk20a_vm_unmap_iommu; > + priv->base.map_sg_iommu = gk20a_vm_map_sg_iommu; > + priv->base.unmap = gf100_vm_unmap; > + priv->base.flush = gf100_vm_flush; > + > + return 0; > +} > + > +struct nvkm_oclass > +gk20a_mmu_oclass = { > + .handle = NV_SUBDEV(MMU, 0xea), > + .ofuncs = &(struct nvkm_ofuncs) { > + .ctor = gk20a_mmu_ctor, > + .dtor = _nvkm_mmu_dtor, > +...