search for: gf100_ram_ctor

Displaying 7 results from an estimated 7 matches for "gf100_ram_ctor".

2017 Mar 14
0
[bug report] drm/nouveau/fb/gf100-: rework ram detection
Hello Ben Skeggs, The patch 97e5268d57bb: "drm/nouveau/fb/gf100-: rework ram detection" from Mar 2, 2017, leads to the following static checker warning: drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c:592 gf100_ram_ctor() warn: should 'size << 20' be a 64 bit type? drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 572 gf100_ram_ctor(const struct nvkm_ram_func *func, struct nvkm_fb *fb, 573 struct nvkm_ram *ram) 574 { 575 struct nvkm_subdev *subdev = &fb-&g...
2017 Apr 29
1
[PATCH] drm/nouveau/fb/gf100-: Fix 32 bit wraparound in new ram detection
...ion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c index 53c32fc..c639759 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c @@ -589,7 +589,7 @@ gf100_ram_ctor(const struct nvkm_ram_func *func, struct nvkm_fb *fb, nvkm_debug(subdev, "FBP %d: %4d MiB, %d LTC(s)\n", fbp, size, ltcs); lcomm = min(lcomm, (u64)(size / ltcs) << 20); - total += size << 20; + total += (u64) size << 20; ltcn += ltcs; } else...
2016 Mar 04
2
[PATCH 0/2] enable memory reclocking on maxwell1
A quick look over the memory reclocking part inside the maxwell mmiotraces kind of reminded me of the kepler memory reclocking, it looks for most parts the same. I didn't do a deep inspection so treat this with great care, but it seems to work at least on those maxwell gpus this was tested on. It depends on the PMU fixes for the fuc5 though, otherwise the PMU might not work as expected and
2017 Apr 10
0
[PATCH 04/11] nvkm/ramgt215: Move ram training up the chain
...dev/fb/ram.h @@ -1,6 +1,7 @@ #ifndef __NVKM_FB_RAM_PRIV_H__ #define __NVKM_FB_RAM_PRIV_H__ #include "priv.h" +#include <subdev/bios/M0209.h> int nvkm_ram_ctor(const struct nvkm_ram_func *, struct nvkm_fb *, enum nvkm_ram_type, u64 size, u32 tags, @@ -24,6 +25,22 @@ int gf100_ram_ctor(const struct nvkm_ram_func *, struct nvkm_fb *, int gf100_ram_get(struct nvkm_ram *, u64, u32, u32, u32, struct nvkm_mem **); void gf100_ram_put(struct nvkm_ram *, struct nvkm_mem **); +/* Training */ +struct gt215_ram_train { + u16 mask; + struct nvbios_M0209S remap; + struct nvbios_M0209S ty...
2016 Aug 16
21
[PATCH v5 00/20] Engine Reclocking Fixes for Fermi-Maxwell2
I've splitted my big series between the part which actually fixes the engine reclocking bits and the part handling voltage/clock updates on temperature change, so that the more reviewed parts can be merged in faster. This series fixes a lot of Engine reclocking issues found on Fermi, Kepler and all Maxwell generation GPUs. It does _not_ fix memory reclocking on Fermi. It mostly contains of
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches contains some of the preparatory work that I deem stable enough to move upstream. Notable changes - Training pattern upload routines from GK104+ now shared with GT215+ - Timing calculation for Fermi - GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that pesky GT 240. - A routine to translate a VBIOS init
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing changed really. Just resending for easier enforcement of patch order in other people's trees. Sorry for the noise. Original message: No, no, these will not implement Fermi reclocking. This set of patches contains some of the preparatory work that I deem stable enough to move upstream. Notable changes - Training pattern