search for: gf100_gr_priv

Here are a few small fixes for issues we found while implementing support for GM20B. The first two are specific to Tegra/GK20A, but the last 3 patches may have a broader (hopefully beneficial) effect. Note that the newly introduced gf100_gr_wait_idle() function on patch 5/5 is exported on purpose. GK20A and GM20B drivers will soon make use of it. Ben, since you seemed to like these changes, a

Hello everyone, GM20B is the GPU of the upcoming Tegra X1 SoC. This series adds initial support for it, based on a rework of the already-supported GK20A. It also introduces support for NVIDIA-provided firmware files, which is why I have added a few NVIDIA people who are relevant to this discussion. The first patch adds support for loading the FECS and GPCCS firmwares from firmware files

Second version of this patchset. Not many changes since first version - I hope this means the changes are not too controversial. Changes since v1: - Removed lookup for previous FW files in "nouveau/" - Went back to using request_firmware() since we only try to load one file Original cover letter follows: GM20B is the GPU of the upcoming Tegra X1 SoC. This series adds initial support

...nouveau/nvkm/engine/gr/gf100.c index b751d0dc4bf3..34b6d4baea16 100644 --- a/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drm/nouveau/nvkm/engine/gr/gf100.c @@ -241,7 +241,7 @@ static int gf100_gr_set_shader_exceptions(struct nvkm_object *object, u32 mthd, void *pdata, u32 size) { - struct gf100_gr_priv *priv = (void *)nv_engine(object); + struct gf100_gr_priv *priv = (void *)object->engine; if (size >= sizeof(u32)) { u32 data = *(u32 *)pdata ? 0xffffffff : 0x00000000; nv_wr32(priv, 0x419e44, data); -- 2.3.0

...), 1 deletion(-) > > diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c > b/drm/nouveau/nvkm/engine/gr/gf100.c > index 5606c25e5d02..01efc2c96045 100644 > --- a/drm/nouveau/nvkm/engine/gr/gf100.c > +++ b/drm/nouveau/nvkm/engine/gr/gf100.c > @@ -699,7 +699,7 @@ gf100_gr_icmd(struct gf100_gr_priv *priv, const struct > gf100_gr_pack *p) > > while (addr < next) { > nv_wr32(priv, 0x400200, addr); > - nv_wait(priv, 0x400700, 0x00000002, 0x00000000); > + nv_wait(priv, 0x400700, 0x00000004, 0x...

...ot;Nouveau name". The fwname and nvfwname are to be given the Nouveau and > + * NVIDIA names of a given firmware, respectively. This function will then > + * try to load the NVIDIA firmware, then the extracted one, in that order. > + * > + */ > int > gf100_gr_ctor_fw(struct gf100_gr_priv *priv, const char *fwname, > - struct gf100_gr_fuc *fuc) > + const char *nvfwname, struct gf100_gr_fuc *fuc) > { > struct nvkm_device *device = nv_device(priv); > const struct firmware *fw; > - char f[32]; > - int ret;...

Hi there, Resending these now that they've had some more polish and testing, and I heard that Ben's vacation is over :-) These patches work as a starting point for more explicit error mechanisms and better robustness. At the moment, when a job hangs or faults, it seems that nouveau doesn't quite know how to handle the situation and often results in a hang. Some of these situations