search for: gf100_clk

...dev/clk/gk104.c | 5 ++++- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 7f67f9f5..a97af0e9 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -368,6 +368,7 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) struct gf100_clk_info *info = &clk->eng[idx]; struct nvkm_device *device = clk->base.subdev.device; const u32 addr = 0x137000 + (idx * 0x20); + bool bypass_state = false; if (idx <= 7) { nvkm_mask(device, addr + 0x00, 0x00000004, 0x0000...

Although memory reclocking seems to be completely broken on my GF119, we can at least allow users to enable reclocking for the core clock. Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com> --- drm/nouveau/nvkm/subdev/fb/ramgf100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/subdev/fb/ramgf100.c b/drm/nouveau/nvkm/subdev/fb/ramgf100.c

...ev/clk/gk104.c | 6 ++++-- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 7f67f9f5..510ab8ce 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -368,6 +368,7 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) struct gf100_clk_info *info = &clk->eng[idx]; struct nvkm_device *device = clk->base.subdev.device; const u32 addr = 0x137000 + (idx * 0x20); + bool bypass_state = false; if (idx <= 7) { nvkm_mask(device, addr + 0x00, 0x00000004, 0x0000...

...sertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c index 78c449b..026baff 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -366,11 +366,17 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) if (info->coef) { nvkm_wr32(device, addr + 0x04, info->coef); nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001); + + /* Test PLL lock */ + nvkm_mask(device, addr + 0x00, 0x00000010, 0x00000000); nvkm_msec(device, 2000, if (nv...

some chipset have working engine reclocking, but broken memory reclocking like Fermi. We should for now, add the functionality to allow partly reclocking for those. Allthough this doesn't give as much performance as one might wish, it is till noticeable and may improve performance enough to be noted. Karol Herbst (2): clk: seperate engine and memory reclock toggles clk: allow engine

Following a series of three patches, two of which have been sitting in my tree for a while, the third is the result of some inspection of an NV134 BIOS that seems to use the 0xaf upcode to upload training patterns. Please test! Roy Ps. Sorry they come from yet another e-mail address. My previous provider, eclipso, actively blocks users of git send-email. Inquiries fall on deaf ears, hence I

...nvkm/subdev/clk/gf100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index ad93350..2ce902f 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -535,6 +535,6 @@ gf100_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk) return -ENOMEM; *pclk = &clk->base; - return nvkm_clk_ctor(&gf100_clk, device, index, false, false, + return nvkm_clk_ctor(&gf100_clk, device, index, true, false, &clk->base); } -- 2.7.0

...6 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c index f9a4918..80c6dd6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -99,7 +99,7 @@ read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl) { struct nvkm_device *device = clk->base.subdev.device; u32 ssrc = nvkm_rd32(device, dsrc + (doff * 4)); - u32 sctl = nvkm_rd32(device, dctl + (doff * 4)); + u32 sclk, sctl, sdiv = 2; switch (ssrc & 0x00000003) { case 0: @@ -109,13 +109,21 @@ re...

...6 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c index 026baff..89d5543 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -99,7 +99,7 @@ read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl) { struct nvkm_device *device = clk->base.subdev.device; u32 ssrc = nvkm_rd32(device, dsrc + (doff * 4)); - u32 sctl = nvkm_rd32(device, dctl + (doff * 4)); + u32 sclk, sctl, sdiv = 2; switch (ssrc & 0x00000003) { case 0: @@ -109,13 +109,21 @@ re...

...drm/nouveau/nvkm/subdev/clk/gk104.c | 1 - 2 files changed, 2 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 7f67f9f5..fe56817b 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -381,7 +381,6 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) if (nvkm_rd32(device, addr + 0x00) & 0x00020000) break; ); - nvkm_mask(device, addr + 0x00, 0x00000010, 0x00000010); /* Enable sync mode */ nvkm_mask(device, addr + 0x00, 0x00000004, 0x00000004); diff --git a/drm/nouveau/nvkm/sub...

...Pierre > } > > clk->func = func; > diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c > index a52b7e7..eaf4f83 100644 > --- a/drm/nouveau/nvkm/subdev/clk/gf100.c > +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c > @@ -443,7 +443,7 @@ gf100_clk = { > { nv_clk_src_hubk06 , 0x00 }, > { nv_clk_src_hubk01 , 0x01 }, > { nv_clk_src_copy , 0x02 }, > - { nv_clk_src_gpc , 0x03, 0, "core", 2000 }, > + { nv_clk_src_gpc , 0x03, NVKM_CLK_DOM_FLAG_BASE_CLOCK_CORE, "core", 2000 }, > { nv_clk_sr...

...sertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c index 78c449b..f9a4918 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -366,11 +366,20 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) if (info->coef) { nvkm_wr32(device, addr + 0x04, info->coef); nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001); - nvkm_msec(device, 2000, + + /* Test PLL lock */ + nvkm_mask(device, addr + 0x00, 0x00000010, 0x00000000); + if (nvk...

...eau/nvkm/subdev/clk/gk104.c | 8 -------- 2 files changed, 16 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 7f67f9f5..7ba2a000 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -375,14 +375,6 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) nvkm_wr32(device, addr + 0x04, info->coef); nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001); - /* Test PLL lock */ - nvkm_mask(device, addr + 0x00, 0x00000010, 0x00000000); - nvkm_msec(device, 2000, - if (nvkm_rd32(device, addr + 0...

.../ 2); + } + } else { + clk->boost_mode = -1; } clk->func = func; diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index a52b7e7..eaf4f83 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -443,7 +443,7 @@ gf100_clk = { { nv_clk_src_hubk06 , 0x00 }, { nv_clk_src_hubk01 , 0x01 }, { nv_clk_src_copy , 0x02 }, - { nv_clk_src_gpc , 0x03, 0, "core", 2000 }, + { nv_clk_src_gpc , 0x03, NVKM_CLK_DOM_FLAG_BASE_CLOCK_CORE, "core", 2000 }, { nv_clk_src_rop , 0x04 }, { nv_clk...

...%i MHz\n", base.clock_mhz / 2); + } } clk->func = func; diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 78c449b..71b7c9f 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -443,7 +443,7 @@ gf100_clk = { { nv_clk_src_hubk06 , 0x00 }, { nv_clk_src_hubk01 , 0x01 }, { nv_clk_src_copy , 0x02 }, - { nv_clk_src_gpc , 0x03, 0, "core", 2000 }, + { nv_clk_src_gpc , 0x03, NVKM_CLK_DOM_FLAG_BASECLK, "core", 2000 }, { nv_clk_src_rop , 0x04 }, { nv_clk_src_mem...

...; INIT_LIST_HEAD(&clk->states); clk->domains = func->domains; diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 78c449b..71b7c9f 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -443,7 +443,7 @@ gf100_clk = { { nv_clk_src_hubk06 , 0x00 }, { nv_clk_src_hubk01 , 0x01 }, { nv_clk_src_copy , 0x02 }, - { nv_clk_src_gpc , 0x03, 0, "core", 2000 }, + { nv_clk_src_gpc , 0x03, NVKM_CLK_DOM_FLAG_BASECLK, "core", 2000 }, { nv_clk_src_rop , 0x04 }, { nv_clk_src_mem...

...k->func = func; > > diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c > > b/drm/nouveau/nvkm/subdev/clk/gf100.c > > index a52b7e7..eaf4f83 100644 > > --- a/drm/nouveau/nvkm/subdev/clk/gf100.c > > +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c > > @@ -443,7 +443,7 @@ gf100_clk = { > > { nv_clk_src_hubk06 , 0x00 }, > > { nv_clk_src_hubk01 , 0x01 }, > > { nv_clk_src_copy , 0x02 }, > > - { nv_clk_src_gpc , 0x03, 0, "core", 2000 }, > > + { nv_clk_src_gpc , 0x03, NVKM_CLK_DOM_FLAG_BASE_CLOCK_CORE, "core", 2000 > > }, &gt...

.../nvkm/subdev/clk/gf100.c index 808e1ed..5025dcc 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -28,6 +28,7 @@ #include <subdev/bios.h> #include <subdev/bios/pll.h> #include <subdev/timer.h> +#include <subdev/volt.h> struct gf100_clk_info { u32 freq; @@ -431,13 +432,72 @@ gf100_clk_tidy(struct nvkm_clk *base) memset(clk->eng, 0x00, sizeof(clk->eng)); } +static int +gf100_clk_update_volt(struct nvkm_clk *clk) +{ + struct nvkm_subdev *subdev = &clk->subdev; + struct nvkm_volt *volt = subdev->device->volt...

....domains = { { nv_clk_src_crystal, 0xff }, { nv_clk_src_href , 0xff }, diff --git a/drm/nouveau/nvkm/subdev/clk/gf100.c b/drm/nouveau/nvkm/subdev/clk/gf100.c index 71b7c9f..808e1ed 100644 --- a/drm/nouveau/nvkm/subdev/clk/gf100.c +++ b/drm/nouveau/nvkm/subdev/clk/gf100.c @@ -437,6 +437,7 @@ gf100_clk = { .calc = gf100_clk_calc, .prog = gf100_clk_prog, .tidy = gf100_clk_tidy, + .update = nv40_clk_update, .domains = { { nv_clk_src_crystal, 0xff }, { nv_clk_src_href , 0xff }, diff --git a/drm/nouveau/nvkm/subdev/clk/gk104.c b/drm/nouveau/nvkm/subdev/clk/gk104.c index 639234f..8448a...

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are