Displaying 3 results from an estimated 3 matches for "getvectortypebreakdown".
2010 Mar 10
1
[LLVMdev] Vectors of length 3 as first-class types
I'm trying the following code on X86:
define <3 x i32> @retThree( ) {
ret <3 x i32> <i32 1, i32 2, i32 3 >
}
expecting it to load the three first lanes of %xmm0. (If returning a
vector of four, %xmm0 is used). But the generated assembly seems to be
using the method of return by hidden pointer. This despite that the
generated assembly seems to have allocated the vector
2020 Jan 03
2
Legalizing vector types
Hi all,
I am working on a target that has support for v4i16 vectors, and no
support for v4i8 / v8i8 / v8i16
V4i8 is promoted to v4i16 which is nice
V8i16 is split to 2 x v4i16 which is nice as well
Now v8i8 is scalarized, which is not so nice.
Ideally I would like v8i8 to be first promoted to v8i16 then split to
2xv4i16 (or split to 2xV4i8 then promoted to 2xv4i16)
Is there a way to achieve
2012 Dec 06
0
[LLVMdev] [PATCH] Replacing EVT:s with MVT:s (when possible)
...get/X86/X86FastISel.cpp | 4 ++--
7 files changed, 24 insertions(+), 24 deletions(-)
commit 9f0cb7ed22f2791a7f315d44827a64de2503e145
Author: Patrik Hägglund <patrik.h.hagglund at ericsson.com>
Date: Wed Dec 5 14:04:17 2012 +0100
Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.
include/llvm/Target/TargetLowering.h | 10 ++++++----
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 14 +++++++++-----
lib/CodeGen/SelectionDAG/TargetLowering.cpp | 19 ++++++++++---------
3 files changed, 25 insertions(+), 18 deletions(-)
commit b2e1d4b18...