Displaying 5 results from an estimated 5 matches for "getvecload".
2007 Jul 23
0
[LLVMdev] alias information on machine instructions
...cValue, instead of just
using the existing SRCVALUE.
> + else if (MRO.SrcValue && !MRO.SrcValue->getName().empty())
> + OS << "[" << MRO.SrcValue->getName() << "]";
This code should also print the SVOffset value.
> + SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain,
> + SDOperand Ptr, SDOperand SV);
This is code that was deleted from the LLVM trunk recently; it looks like it
shouldn't be included in this patch.
Dan
--
Dan Gohman, Cray Inc.
2007 Jul 23
1
[LLVMdev] alias information on machine instructions
hi,
i know it took a while, but here is a patch that adds a list of source
values to machine instructions.
i modified the DAGISelEmiter to automatically catch regular
loads/stores. custom instructions and loads/stores rewritten by the
lowering pass are not automatically captured.
during the instruction selection a source value operand is added to the
DAG for patterns matching a load/store.
2007 Jul 24
1
[LLVMdev] alias information on machine instructions
...ner an "overlap" is calculated from the type size, the offset
and an other offset. how is this supposed to work?
the arguments of the "alias" function are named "V1Size" and "V2Size",
so it would make sense to pass the size only?
>
>> + SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain,
>> + SDOperand Ptr, SDOperand SV);
>
> This is code that was deleted from the LLVM trunk recently; it looks like it
> shouldn't be included in this patch.
you are right, sorry.
florian
2007 Jun 15
6
[LLVMdev] alias information on machine instructions
hi,
Florian Brandner wrote:
> Dan Gohman wrote:
>> On Wed, May 23, 2007 at 12:23:38AM -0700, Chris Lattner wrote:
>>> Right. The original Value*'s are preserved in the DAG, but dropped when
>>> MachineInstrs are created. We could add a machineoperand to capture this
>>> Value* if desired.
>> Another benefit of keeping the original Value*'s
2006 Dec 19
3
[LLVMdev] alias-aware scheduling
...const Value *SV, SDOperand Root,
- bool isVolatile) {
SDOperand L;
if (const PackedType *PTy = dyn_cast<PackedType>(Ty)) {
MVT::ValueType PVT = TLI.getValueType(PTy->getElementType());
L = DAG.getVecLoad(PTy->getNumElements(), PVT, Root, Ptr,
- DAG.getSrcValue(SV));
+ DAG.getSrcValue(PtrV));
} else {
- L = DAG.getLoad(TLI.getValueType(Ty), Root, Ptr, SV, isVolatile);
+ L = DAG.getLoad(TLI.getValueType(Ty), Root, Ptr, PtrV, Offset, isVolatile);...