search for: getvalueasdef

Displaying 6 results from an estimated 6 matches for "getvalueasdef".

2013 May 17
2
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...contain value types instead of register classes (FastISelEmitter.cpp, lines 253ff.): // For now, the only other thing we accept is register operands. const CodeGenRegisterClass *RC = 0; if (OpLeafRec->isSubClassOf("RegisterOperand")) OpLeafRec = OpLeafRec->getValueAsDef("RegClass"); if (OpLeafRec->isSubClassOf("RegisterClass")) RC = &Target.getRegisterClass(OpLeafRec); else if (OpLeafRec->isSubClassOf("Register")) RC = Target.getRegBank().getRegClassForRegister(OpLeafRec); else retur...
2013 May 17
0
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...d of register classes (FastISelEmitter.cpp, > lines 253ff.): > > // For now, the only other thing we accept is register operands. > const CodeGenRegisterClass *RC = 0; > if (OpLeafRec->isSubClassOf("RegisterOperand")) > OpLeafRec = OpLeafRec->getValueAsDef("RegClass"); > if (OpLeafRec->isSubClassOf("RegisterClass")) > RC = &Target.getRegisterClass(OpLeafRec); > else if (OpLeafRec->isSubClassOf("Register")) > RC = Target.getRegBank().getRegClassForRegister(OpLeafRec); >...
2007 Feb 05
2
[LLVMdev] automatically generating intrinsic declarations
...tegerType")) { + OS << "IntegerType::get(" << ArgType->getValueAsInt("Width") << ")"; + } else if (ArgType->isSubClassOf("LLVMPackedType")) { + OS << "PackedType::get("; + EmitTypeGenerate(OS, ArgType->getValueAsDef("ElTy")); + OS << ", " << ArgType->getValueAsInt("NumElts") << ")"; + } else { + OS << "Type::getPrimitiveType("; + OS << ArgType->getValueAsString("TypeVal") << ")"; + } +} +...
2007 Feb 05
0
[LLVMdev] automatically generating intrinsic declarations
On Mon, 5 Feb 2007, Dan Gohman wrote: > LLVM knows what all the types of the intrinsic functions are; I thought, > why are users (including llvm-gcc...) required to duplicate all this > information in order to use them? I mean in order to call > getOrInsertFunction to get declarations for them. That is an excellent question! :) In the bad old days, we used to allow intrinsics
2007 Feb 06
1
[LLVMdev] automatically generating intrinsic declarations
...tegerType")) { + OS << "IntegerType::get(" << ArgType->getValueAsInt("Width") << ")"; + } else if (ArgType->isSubClassOf("LLVMPackedType")) { + OS << "PackedType::get("; + EmitTypeGenerate(OS, ArgType->getValueAsDef("ElTy")); + OS << ", " << ArgType->getValueAsInt("NumElts") << ")"; + } else if (ArgType->isSubClassOf("LLVMPointerType")) { + OS << "PointerType::get("; + EmitTypeGenerate(OS, ArgType->getValueAs...
2013 May 19
1
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...lEmitter.cpp, > > lines 253ff.): > > > > // For now, the only other thing we accept is register operands. > > const CodeGenRegisterClass *RC = 0; > > if (OpLeafRec->isSubClassOf("RegisterOperand")) > > OpLeafRec = OpLeafRec->getValueAsDef("RegClass"); > > if (OpLeafRec->isSubClassOf("RegisterClass")) > > RC = &Target.getRegisterClass(OpLeafRec); > > else if (OpLeafRec->isSubClassOf("Register")) > > RC = Target.getRegBank().getRegClassForRegister(...