Displaying 3 results from an estimated 3 matches for "gettargetshufflenod".
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gettargetshufflenode
2011 Feb 25
2
[LLVMdev] X86 LowerVECTOR_SHUFFLE Question
In ToT, LowerVECTOR_SHUFFLE for x86 has this code:
if (X86::isUNPCKLMask(SVOp))
getTargetShuffleNode(getUNPCKLOpcode(VT) dl, VT, V1, V2, DAG);
why would this not be:
if (X86::isUNPCKLMask(SVOp))
return SVOp;
I'm trying to add support for VUNPCKL and am getting into trouble
because the existing code ends up creating:
VUNPCKLPS
load
load
which is badness come selection time. Leg...
2011 Feb 26
0
[LLVMdev] X86 LowerVECTOR_SHUFFLE Question
David Greene <dag at cray.com> writes:
> In ToT, LowerVECTOR_SHUFFLE for x86 has this code:
>
> if (X86::isUNPCKLMask(SVOp))
> getTargetShuffleNode(getUNPCKLOpcode(VT) dl, VT, V1, V2, DAG);
>
> why would this not be:
>
> if (X86::isUNPCKLMask(SVOp))
> return SVOp;
Ok, I discovered that Bruno did this in revisions 112934, 112942 and
113020 but the logs don't really make clear why. I did figure out that
I needed new S...
2011 Feb 26
2
[LLVMdev] X86 LowerVECTOR_SHUFFLE Question
...lity and also make it much easier to match the shuffles during isel.
On Feb 25, 2011, at 6:01 PM, David A. Greene wrote:
> David Greene <dag at cray.com> writes:
>
>> In ToT, LowerVECTOR_SHUFFLE for x86 has this code:
>>
>> if (X86::isUNPCKLMask(SVOp))
>> getTargetShuffleNode(getUNPCKLOpcode(VT) dl, VT, V1, V2, DAG);
>>
>> why would this not be:
>>
>> if (X86::isUNPCKLMask(SVOp))
>> return SVOp;
>
> Ok, I discovered that Bruno did this in revisions 112934, 112942 and
> 113020 but the logs don't really make clear why. I...