search for: gettargetlowering

Displaying 14 results from an estimated 14 matches for "gettargetlowering".

2015 Dec 14
3
Getting TargetLowering in AsmPrinter / Lowering constant addrspacecast
...ng::isNoopAddrSpaceCast(SrcAS, DestAS) returns true. In this case the MCExpr for the addrspacecast is the MCExpr of its first operand. It seems hard to obtain an instance of TargetLowering in AsmPrinter::lowerConstant(). Other methods in this class obtain it by calling `MF->getSubtarget().getTargetLowering()`. However, because MF is nullptr when lowering initializers of global variables, it won't work. My impression is that this is not possible because every function has its own TargetLowering instance. Is that correct? NVPTX solves the problem by having a method on it's NVPTXAsmPrinte...
2013 Feb 03
1
[LLVMdev] Chain and glue operands should occur at end of operand list
...:SelectThumbAddrModeImm5S Base = N.getOperand(0); OffImm = CurDAG->getTargetConstant(0, MVT::i32); If I do a similar thing in my backend, I get this assertion message. I found out that if I execute the code below, the problem disappear. Base = N; OffImm = CurDAG->getTargetConstant(0, TM.getTargetLowering()->getPointerTy()); Only the change for Base seems relevant to the error though. Could someone give me some pointers to understand what's going on. For example, something to read about what is "chain & glue". Cheers, Sebastien -------------- next part --------------...
2013 Jul 16
1
[LLVMdev] Instantiating Target-Specifc ASM Parser
Hello, I am working on backend development and would like to utilize my target's MCAsmParser inside of an MCInst-level class implementation. I noticed that the AsmParser is registered with the target registry however I am having no luck grepping for a "template" of how to instantiate it and have yet to find specific documentation on how it is done. Any ideas or help is greatly
2007 Dec 11
0
[LLVMdev] Exception handling in JIT
...================= > --- lib/CodeGen/LLVMTargetMachine.cpp (revision 44794) > +++ lib/CodeGen/LLVMTargetMachine.cpp (working copy) > @@ -158,7 +158,8 @@ > PM.add(createLowerGCPass()); > > // FIXME: Implement the invoke/unwind instructions! > - PM.add(createLowerInvokePass(getTargetLowering())); > + if (!ExceptionHandling) > + PM.add(createLowerInvokePass(getTargetLowering())); Is this right? > > // Make sure that no unreachable blocks are instruction selected. > PM.add(createUnreachableBlockEliminationPass()); > Index: lib/CodeGen/ELFWriter.cpp > ====...
2007 Dec 12
3
[LLVMdev] Exception handling in JIT
...-- lib/CodeGen/LLVMTargetMachine.cpp (revision 44794) >> +++ lib/CodeGen/LLVMTargetMachine.cpp (working copy) >> @@ -158,7 +158,8 @@ >> PM.add(createLowerGCPass()); >> >> // FIXME: Implement the invoke/unwind instructions! >> - PM.add(createLowerInvokePass(getTargetLowering())); >> + if (!ExceptionHandling) >> + PM.add(createLowerInvokePass(getTargetLowering())); >> > > Is this right? > > >From LowerInvoke.cpp: " This transformation is designed for use by code generators which do not yet support stack unwinding"....
2007 Dec 10
2
[LLVMdev] Exception handling in JIT
Hi everyone, Here's a patch that enables exception handling when jitting. I've copy/pasted _many_code from lib/Codegen/DwarfWriter.cpp, so we may need to factorize it, but the functionality is there and I'm very happy with it :) lli should now be able to execute the output from llvm-gcc when using exceptions (the UnwindInst instruction is not involved in this patch). Just add the
2011 Jun 06
0
[LLVMdev] Understanding SelectionDAG construction
Hi Ankur, > The flags "-view-sched-dags".. described in the doc doesn't seem to work. ( > "llc -help" doesn't list it ). as far as I remember, displaying DAGs during compilation is only enabled in "debug builds" [1] of LLVM. You probably have to re-configure and re-compile LLVM to enable this feature. Best regards, Christoph [1]
2011 Jun 06
4
[LLVMdev] Understanding SelectionDAG construction
I am trying to understand the SelectionDAG construction from LLVM IR. I have gone through the doc "The LLVM Target-Independent Code Generator" on LLVM site. This gives a great initial overview. However I am unable to catch the actual control flow for the llvm->selectionDag conversion. The flags "-view-sched-dags".. described in the doc doesn't seem to work. ( "llc
2008 Feb 04
0
[LLVMdev] Exception handling in JIT
...========== > --- lib/CodeGen/LLVMTargetMachine.cpp (revision 46612) > +++ lib/CodeGen/LLVMTargetMachine.cpp (working copy) > @@ -186,8 +186,8 @@ > > PM.add(createGCLoweringPass()); > > - // FIXME: Implement the invoke/unwind instructions! > - PM.add(createLowerInvokePass(getTargetLowering())); > + if (!ExceptionHandling) > + PM.add(createLowerInvokePass(getTargetLowering())); > > // Make sure that no unreachable blocks are instruction selected. > PM.add(createUnreachableBlockEliminationPass()); > Index: lib/CodeGen/ELFWriter.cpp > =======================...
2008 Feb 01
2
[LLVMdev] Exception handling in JIT
Dear all, Here's a new patch with Evan's comments (thx Evan!) and some cleanups. Now the (duplicated) exception handling code is in a new file: lib/ExecutionEngine/JIT/JITDwarfEmitter. This patch should work on linux/x86 and linux/ppc (tested). Nicolas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: jit-exceptions.patch URL:
2020 Jan 10
2
Register Dataflow Analysis on X86
Hi Scott, Sorry for the late reply, I was out of office during the holidays. 1. A def node can reach either a use node, or another def node. In the highlighted phi node (p3224), the def (d3225) reaches another def (1598) in statement (s1597), that’s why it’s needed. 2. The reason why the def of R11 in s1578 is not connected directly to the use in s1725 is that there may be an intervening
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...nfo() const {return InstrInfo;} > + virtual const AMDGPUSubtarget *getSubtargetImpl() const {return &Subtarget; } > + virtual const AMDGPURegisterInfo *getRegisterInfo() const { > + return &InstrInfo->getRegisterInfo(); > + } > + virtual AMDGPUTargetLowering * getTargetLowering() const { > + return TLInfo; > + } > + virtual const InstrItineraryData* getInstrItineraryData() const { > + return InstrItins; > + } > + virtual const TargetData* getTargetData() const { return &DataLayout; } > + virtual TargetPassConfig *createPassConf...
2014 Mar 07
3
[LLVMdev] [RFC] Add second "failure" AtomicOrdering to cmpxchg instruction
...c dl = getCurSDLoc(); - AtomicOrdering Order = I.getOrdering(); + AtomicOrdering SuccessOrder = I.getSuccessOrdering(); + AtomicOrdering FailureOrder = I.getFailureOrdering(); SynchronizationScope Scope = I.getSynchScope(); SDValue InChain = getRoot(); const TargetLowering *TLI = TM.getTargetLowering(); if (TLI->getInsertFencesForAtomic()) - InChain = InsertFenceForAtomic(InChain, Order, Scope, true, dl, + InChain = InsertFenceForAtomic(InChain, SuccessOrder, Scope, true, dl, DAG, *TLI); SDValue L = @@ -3623,13 +3624,14 @@ void SelectionDAGBu...
2014 Nov 03
8
[LLVMdev] [PATCH] Protection against stack-based memory corruption errors using SafeStack
...DEBUG(dbgs() << "[SafeStack] no functions to instrument\n"); + return false; // Nothing to do + } + + AA = &getAnalysis<AliasAnalysis>(); + + assert(TM != NULL && "SafeStack requires TargetMachine"); + TLI = TM->getSubtargetImpl()->getTargetLowering(); + DL = TLI->getDataLayout(); + + // Add module-level code (e.g., runtime support function prototypes) + doPassInitialization(M); + + // Add safe stack instrumentation to all functions that need it + for (Module::iterator It = M.begin(), Ie = M.end(); It != Ie; ++It) { + Fu...