search for: getsubtarget

Displaying 20 results from an estimated 67 matches for "getsubtarget".

2015 Mar 21
3
[LLVMdev] API Changes: TargetMachine::getSubtarget
Hi all, As of r232885 I've removed the argument-less TargetMachine::getSubtarget and TargetMachine::getSubtargetImpl. For the targets that aren't completely independent of this I've gone ahead and left a non-virtual version of the function in the target specific TargetMachine. What this means in practice is that those targets can only use a bare getSubtarget call in the...
2011 May 08
0
[LLVMdev] [PATCH ]Add Subtarget ptx23
On Sat, May 7, 2011 at 4:17 AM, 陳韋任 <chenwj at iis.sinica.edu.tw> wrote: > Hi, Justin > > Thansk, but I have a little concern though. I saw Chiou mentioned the > compatibility issue of PTX on the mailing list. > http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-March/038654.html > > In my PTX.td patch, > > def FeaturePTX23 : SubtargetFeature<"ptx23",
2011 May 07
2
[LLVMdev] [PATCH ]Add Subtarget ptx23
Hi, Justin Thansk, but I have a little concern though. I saw Chiou mentioned the compatibility issue of PTX on the mailing list. http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-March/038654.html In my PTX.td patch, def FeaturePTX23 : SubtargetFeature<"ptx23", "PTXVersion", PTX_VERSION_2_3", "Use PTX Language Version
2015 Dec 14
3
Getting TargetLowering in AsmPrinter / Lowering constant addrspacecast
...f TargetLowering::isNoopAddrSpaceCast(SrcAS, DestAS) returns true. In this case the MCExpr for the addrspacecast is the MCExpr of its first operand. It seems hard to obtain an instance of TargetLowering in AsmPrinter::lowerConstant(). Other methods in this class obtain it by calling `MF->getSubtarget().getTargetLowering()`. However, because MF is nullptr when lowering initializers of global variables, it won't work. My impression is that this is not possible because every function has its own TargetLowering instance. Is that correct? NVPTX solves the problem by having a method on it&...
2009 Feb 23
1
[LLVMdev] 2.5 Pre-release2 available for testing
On Mon, Feb 23, 2009 at 12:12 AM, Aaron Gray < aaronngray.lists at googlemail.com> wrote: > On Sun, Feb 22, 2009 at 11:15 PM, Anton Korobeynikov < > anton at korobeynikov.info> wrote: > >> >> Actually its [configure-stage3-intl] where its hanging. >> >> This can easily be due to inline FP math in the stdlib headers. For >> example - I had to
2015 Jan 27
7
[LLVMdev] Embedding cpu and feature strings into IR and enabling switching subtarget on a per function basis
...mpilers.llvm.devel/80456 The command line options I'm currently looking into are "-target-cpu" and "-target-feature" and I would like to get feedback about the approach I've taken (patches attached). The attached patches make the following changes: - In TargetMachine::getSubtarget(const Function*) and MachineFunction's constructor, use per-function subtarget object instead of TargetMachine's (module-level) subtarget object. This allows passes like selection dag to switch the target on a per-function basis. - Define class TargetOptions::Option, which records whether...
2011 Jun 15
0
[LLVMdev] Custom allocation orders
...B, X86::R10B, X86::R11B, X86::BL, X86::R14B, X86::R15B, X86::R12B, X86::R13B, X86::BPL }; GR8Class::iterator GR8Class::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); if (Subtarget.is64Bit()) return X86_GR8_AO_64; else return begin(); } GR8Class::iterator GR8Class::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); const TargetFrameL...
2017 Oct 20
6
Whither/whether -mtune support?
...basis d) Use them in TTI and various other backend hooks rather than any code gen specific ones. Simple right? :) I'm happy to elaborate here, but I believe the work is relatively straight forward if a lot of typing. Every step there is likely to be a lot more complicated, but similar to the getSubtarget<>/getSubtargetImpl changes it should be very easy to do on any particular backend and fan out support there. Just make sure that clang knows which targets do and don't support the flag. Happy to help or review work here. Thanks! -eric -------------- next part -------------- An HTML att...
2007 Feb 14
2
[LLVMdev] Linux/ppc backend
...5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19, LR,CTR, CR0,CR1,CR5,CR6,CR7} GPRClass::iterator GPRClass::allocation_order_begin(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); const PPCSubtarget &Subtarget = TM.getSubtarget<PPCSubtarget>(); if (Subtarget.isMachoABI()){ return Defs_Macho; } else { return Defs_ELF; } } GPRClass::iterator GPRClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); cons...
2009 Jun 10
3
[LLVMdev] Why does the x86-64 JIT emit stubs for external calls?
...6CodeGen.cpp, the following code appears in the handler used for CALL64pcrel32 instructions: // Assume undefined functions may be outside the Small codespace. bool NeedStub = (Is64BitMode && (TM.getCodeModel() == CodeModel::Large || TM.getSubtarget<X86Subtarget>().isTargetDarwin())) || Opcode == X86::TAILJMPd; emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, MO.getOffset(), 0, NeedStub); This causes every external call to be emitted as a call to a stub which then jumps to the real fun...
2013 Apr 01
0
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
.../Mips/MipsConstantIslandPass.cpp @@ -80,6 +80,9 @@ FunctionPass *llvm::createMipsConstantIslandPass(MipsTargetMachine &tm) { } bool MipsConstantIslands::runOnMachineFunction(MachineFunction &F) { - return true; + // The intention is for this to be a mips16 only pass for now + if (!TM.getSubtarget<MipsSubtarget>().inMips16Mode()) + return false; + return false; } diff --git a/lib/Target/Mips/MipsLongBranch.cpp b/lib/Target/Mips/MipsLongBranch.cpp index 2efe534..bf5ad37 100644 --- a/lib/Target/Mips/MipsLongBranch.cpp +++ b/lib/Target/Mips/MipsLongBranch.cpp @@ -399,6 +399,8 @@ st...
2013 Oct 10
0
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
...-45,32 +45,63 @@ > TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass); > } > > +AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) > + : AsmPrinter(TM, Streamer) > +{ > + const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>(); > + > + DisasmEnabled = STM.dumpCode() && > + STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS && > + ! Streamer.hasRawTextSupport(); > +} > + > /// We need to override this function so we...
2007 Jul 30
1
[LLVMdev] Subtarget class
What's the purpose of the TargetSubtarget class? It appears the only users of getSubtarget are in the target-specific code, where the abstraction is superfluous. Is it just a way to encourage targets to follow a nice pattern of keeping subtarget state in a separate class, or are there grand plans? Dan -- Dan Gohman, Cray Inc.
2013 Apr 01
3
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote: > IMHO the right way to handle target function attributes is to > re-initialize the target machine and TTI for every function (if the > attributes changed). Do you have another solution in mind ? I don't really understand this. TargetMachine and TTI may be quite expensive to initialize. Doing so for
2020 Nov 12
2
LLVM X86 MachineBasicBlock inserting push and pop instructions causes segmentation fault
...rcx before each basic block (only the relevant logic portions are included): /* Inserts push rcx followed by pop rcx before each MachineBasicBlock */ void VirtualTimeManager::__insertVtlLogic(MachineFunction &MF, MachineBasicBlock* origMBB) { const llvm::TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); auto MMI = &MF.getMMI(); llvm::Module &M = const_cast<Module &>(*MMI->getModule()); if (origMBB->empty() || !origMBB->isLegalToHoistInto()) return; llvm::BuildMI(*origMBB, origMBB->begin(), DebugLoc(), TII.get(X86::POP...
2013 Oct 10
2
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
Hi, This patch adds R600/SI disassembly text to compiled object files, when a code dump is requested, to assist debugging in Mesa clients. Here's an example of the output in a Mesa client with a corresponding patch and RADEON_DUMP_SHADERS set: Shader Disassembly: S_WQM_B64 EXEC, EXEC ; BEFE0A7E S_MOV_B32 M0, SGPR6 ; BEFC0306
2009 Jun 11
0
[LLVMdev] Why does the x86-64 JIT emit stubs for external calls?
...ears in the handler used for > CALL64pcrel32 instructions: > > // Assume undefined functions may be outside the Small > codespace. > bool NeedStub = > (Is64BitMode && > (TM.getCodeModel() == CodeModel::Large || > TM.getSubtarget<X86Subtarget>().isTargetDarwin())) || > Opcode == X86::TAILJMPd; > emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, > MO.getOffset(), 0, NeedStub); > > This causes every external call to be emitted as a call to a stub > which...
2007 Feb 15
0
[LLVMdev] Linux/ppc backend
...6,V17,V18,V19, > LR,CTR, > CR0,CR1,CR5,CR6,CR7} > > GPRClass::iterator > GPRClass::allocation_order_begin(const MachineFunction &MF) > const { > const TargetMachine &TM = MF.getTarget(); > const PPCSubtarget &Subtarget = TM.getSubtarget<PPCSubtarget>(); > if (Subtarget.isMachoABI()){ > return Defs_Macho; > } else { > return Defs_ELF; > } > } > > GPRClass::iterator > GPRClass::allocation_order_end(const MachineFunction &MF) const { > const T...
2007 Oct 04
3
[LLVMdev] RFC: Tail call optimization X86
...callee popping arguments) only when this option is on. See Chris' email: > Sure it can be, you can set up custom predicates, for example the > X86CallingConv.td file has: > > class CCIfSubtarget<string F, CCAction A> > : CCIf<! strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>; > > It would be straight-forward to have a CCIf defined to check some command > line argument. +/// IsEligibleForTailCallElimination - Check to see whether the next instruction +// following the call is a return. A function is eligible if ca...
2007 Feb 02
0
[LLVMdev] Linux/ppc backend
On Fri, 2 Feb 2007, Nicolas Geoffray wrote: > I have almost completed the implementation of a linux/ppc backend in llvm. Cool! > There were a few things to modify in > lib/Target/PowerPC with a lot of "if (!isDarwin)". Some meta comments: 1. Please don't change PPC -> llvmPPC. I assume that you did this because PPC is a #define in some system header. Please