search for: getsubregisterregclass

...[AL, CL, DL, BL, SPL, BPL, SIL, DIL, R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>; class GR16_ ..... { let SubRegClassList = [GR8]; } Refer to below functions in ScheduleDAGEmit.cpp: ----------------------------------------------- static const TargetRegisterClass* getSubRegisterRegClass(const TargetRegisterClass *TRC, unsigned SubIdx) { // Pick the register class of the subregister TargetRegisterInfo::regclass_iterator I = TRC->subregclasses_begin() + SubIdx-1; assert(I < TRC->subregclasses_end() && "Invalid subregister index for register c...

...o values, which are available in register types of FSR8RC, into a register type of FSR16RC. when I use and INSERT_SUBREG with an SubIdx = 0, as you mentioned in > v4= insert_subreg implicit_def, v1, 0 the following function returns an incorrect subregclass: static const TargetRegisterClass* getSubRegisterRegClass(const TargetRegisterClass *TRC, unsigned SubIdx) { // Pick the register class of the subregister TargetRegisterInfo::regclass_iterator I = TRC->subregclasses_begin() + SubIdx-1; assert(I < TRC->subregclasses_end() && "Invalid su...

...t; types of FSR8RC, into a register type of FSR16RC. > > when I use and INSERT_SUBREG with an SubIdx = 0, as you mentioned in > >> v4= insert_subreg implicit_def, v1, 0 > > the following function returns an incorrect subregclass: > > static const TargetRegisterClass* > getSubRegisterRegClass(const TargetRegisterClass *TRC, unsigned > SubIdx) > { > // Pick the register class of the subregister > TargetRegisterInfo::regclass_iterator I = > TRC->subregclasses_begin() + SubIdx-1; > assert(I < TRC->subregclasses_end() && > "Invalid...

...[AL, CL, DL, BL, SPL, BPL, SIL, DIL, > R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>; > > > class GR16_ ..... { > let SubRegClassList = [GR8]; > } Right. Subreg index starts from 1. This ought to be fixed but it's not (yet). > > > The getSubRegisterRegClass uses SubIdx - 1; > > so INSERT_SUBREG (IMPLICIT_DEF, AL, 0) will not work, because > getSubRegisterRegClass will fail.(GR16_ does not have a SubRegClass > at index -1.) > > OTOH, if you use SubIdx as 1, both in SubRegSet and x86_subreg_8bit, > the INSERT_SUBREG (IMPLI...

...R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>; > > > > > > class GR16_ ..... { > > let SubRegClassList = [GR8]; > > } > > Right. Subreg index starts from 1. This ought to be fixed but it's not > (yet). > > > > > > > The getSubRegisterRegClass uses SubIdx - 1; > > > > so INSERT_SUBREG (IMPLICIT_DEF, AL, 0) will not work, because > > getSubRegisterRegClass will fail.(GR16_ does not have a SubRegClass > > at index -1.) > > > > OTOH, if you use SubIdx as 1, both in SubRegSet and x86_subreg_8bit,...

On Oct 2, 2008, at 11:02 AM, Sanjiv.Gupta at microchip.com wrote: > What’s the value produced by an INSERT_SUBREG node? Is it a chain? No, insert_subreg returns a value: v1 = insert_subreg v2, v3, idx v1 and v2 will have the same type, e.g. i16, and v3 must have a sub- register type, e.g. i8. > Can I use to set a superreg of i16 type with two i8 values, and use > the supperreg as

What's the value produced by an INSERT_SUBREG node? Is it a chain? Can I use to set a superreg of i16 type with two i8 values, and use the supperreg as an operand somewhere else? - Sanjiv -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081002/f07bc88c/attachment.html>

...t;> mentioned in >>>>> >>>>>> v4= insert_subreg implicit_def, v1, 0 >>>>> >>>>> the following function returns an incorrect subregclass: >>>>> >>>>> static const TargetRegisterClass* >>>>> getSubRegisterRegClass(const TargetRegisterClass *TRC, unsigned >>>>> SubIdx) >>>>> { >>>>> // Pick the register class of the subregister >>>>> TargetRegisterInfo::regclass_iterator I = >>>>> TRC->subregclasses_begin() + SubIdx-1; >>>...