search for: getsuboperandnumber

Displaying 4 results from an estimated 4 matches for "getsuboperandnumber".

2015 Oct 19
2
Instructions with no operand
...Clr { def _ : ALU<"clr"> {let InstOp = 0b11;} } ----------------------------------------- after compiling the code, I receive the following error: *llvm-tblgen: /llvm/utils/TableGen/CodeGenInstruction.h:186: std::pair<unsigned int, unsigned int> llvm::CGIOperandList::getSubOperandNumber(unsigned int) const: Assertion `i < OperandList.size() && "Invalid flat operand #"' failed.* How can I define an instruction with no operand? In ARM there is a similar instruction like "CLREX" but I don't understand why in the assertion in CodeGenInstruction...
2007 Jan 11
1
[LLVMdev] Pattern matching questions
...t; [(retflag)]>; > } > } > > Output from make: > > llvm[0]: Building SPU.td code emitter with tblgen > tblgen: /work/scottm/llvm/utils/TableGen/CodeGenInstruction.h:118: > std::pair<unsigned int, unsigned int> > llvm::CodeGenInstruction::getSubOperandNumber(unsigned int) const: > Assertion `i < OperandList.size() && "Invalid flat operand #"' failed. > make: *** > [/work/scottm/llvm/obj/i686-unknown-linux-gnu/lib/Target/IBMCellSPU/ > Debug/SPUGenCodeEmitter.inc.tmp] > Aborted > > Whiskey Tango... Foxtrot?...
2007 Jan 10
0
[LLVMdev] Pattern matching questions
...", BranchResolv, [(retflag)]>; } } Output from make: llvm[0]: Building SPU.td code emitter with tblgen tblgen: /work/scottm/llvm/utils/TableGen/CodeGenInstruction.h:118: std::pair<unsigned int, unsigned int> llvm::CodeGenInstruction::getSubOperandNumber(unsigned int) const: Assertion `i < OperandList.size() && "Invalid flat operand #"' failed. make: *** [/work/scottm/llvm/obj/i686-unknown-linux-gnu/lib/Target/IBMCellSPU/Debug/SPUGenCodeEmitter.inc.tmp] Aborted Whiskey Tango... Foxtrot?
2007 Jan 09
2
[LLVMdev] Pattern matching questions
On Tue, 9 Jan 2007, Evan Cheng wrote: >> - How does one deal with multiple instruction sequences in a pattern? >> To load a constant is a two instruction sequence, but both >> instructions only take two operands (assume that r3 is a 32-bit >> register): >> >> ilhu $3, 45 # r3 = (45 << 16) >> iohl $3, 5 # r3 |= 5