Displaying 6 results from an estimated 6 matches for "getslotindexes".
2012 Mar 21
2
[LLVMdev] PBQP & CalcSpillWeights
...isSpillOption(vreg, alloc))
The problem is that pass CalcSpillWeights can 'hint' that it is a poor
idea to spill this specific register with :
CalcSpillWeights.cpp / VirtRegAuxInfo::CalculateWeightAndHint :
// Mark li as unspillable if all live ranges are tiny.
if (li.isZeroLength(LIS.getSlotIndexes())) {
li.markNotSpillable();
...
This hint makes the register non spillable at all for the spiller (that's the
assert above), not just a bad-idea-to-spill-but-feasible. The pbqp allocator
does not cope with this distinction and allways attempts to spill it.
I would need some guidanc...
2012 Aug 31
0
[LLVMdev] Assert in LiveInterval update
...unsigned Root = *Roots;
for (MachineRegisterInfo::use_nodbg_iterator
UI = MRI.use_nodbg_begin(Root),
UE = MRI.use_nodbg_end();
UI != UE; UI.skipInstruction()) {
const MachineInstr* MI = &*UI;
SlotIndex InstSlot =
LIS.getSlotIndexes()->getInstructionIndex(MI);
if (InstSlot > LastUse && InstSlot < OldIdx)
LastUse = InstSlot;
}
//for (MCSuperRegIterator Supers(Root, &TRI); Supers.isValid();
++Supers)
// I do not think we should be doing this here.
}...
2012 Aug 31
2
[LLVMdev] Assert in LiveInterval update
Hi Lang,
Just one more quick question. in LiveIntervalAnalysis.cpp In
SlotIndex findLastUseBefore(unsigned Reg, SlotIndex OldIdx)
Did you really mean to use
for (MachineRegisterInfo::use_nodbg_iterator
UI = MRI.use_nodbg_begin(Reg),
UE = MRI.use_nodbg_end();
UI != UE; UI.skipInstruction()) {}
Aren't we currently dealing with units,
2013 Sep 10
0
[LLVMdev] Fwd: BitcodeWriter.cpp, WriteAttributeGroupTable attribute slot index is hardcoded.. ?
Hi all.
In the beginning of this method I see the next:
for (unsigned i = 0, e = AttrGrps.size(); i != e; ++i) {
AttributeSet AS = AttrGrps[i];
for (unsigned i = 0, e = AS.getNumSlots(); i != e; ++i) {
AttributeSet A = AS.getSlotAttributes(i);
Record.push_back(VE.getAttributeGroupID(A));
Record.push_back(AS.getSlotIndex(i));
for (AttributeSet::iterator I
2012 Sep 03
2
[LLVMdev] Assert in LiveInterval update
...odbg_iterator****
>
> UI = MRI.use_nodbg_begin(Root),****
>
> UE = MRI.use_nodbg_end();****
>
> UI != UE; UI.skipInstruction()) {****
>
> const MachineInstr* MI = &*UI;****
>
> SlotIndex InstSlot =
> LIS.getSlotIndexes()->getInstructionIndex(MI);****
>
> if (InstSlot > LastUse && InstSlot < OldIdx) ****
>
> LastUse = InstSlot;****
>
> }****
>
> //for (MCSuperRegIterator Supers(Root, &TRI); Supers.isValid();
> ++Supers) ****
>
&...
2012 Mar 23
0
[LLVMdev] PBQP & CalcSpillWeights
...;
> The problem is that pass CalcSpillWeights can 'hint' that it is a poor
> idea to spill this specific register with :
>
> CalcSpillWeights.cpp / VirtRegAuxInfo::CalculateWeightAndHint :
> // Mark li as unspillable if all live ranges are tiny.
> if (li.isZeroLength(LIS.getSlotIndexes())) {
> li.markNotSpillable();
> ...
>
> This hint makes the register non spillable at all for the spiller (that's the
> assert above), not just a bad-idea-to-spill-but-feasible. The pbqp allocator
> does not cope with this distinction and allways attempts to spill it.
&...