Displaying 20 results from an estimated 26 matches for "getscalarsizeinbit".
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getscalarsizeinbits
2013 Nov 21
1
[LLVMdev] [PATCH] Making Type::getScalarSizeInBits() const
Hi, while using this function I noticed that Type::getScalarSizeInBits()
is not marked as const even if inside its body it just uses only other
"const" functions and types.
This prevents the usage of the function through const
pointers/references to Type without any apparent reason.
I propose of marking the function as const. (attached is a patch that...
2011 Mar 06
0
[LLVMdev] First Patch
...e than it (not including the
> // sign bit) the ripple may go up to and fill the zero, but won't change the
> // sign. For example, (X & ~4) + 1.
> -
> - // TODO: Implement.
> -
> +
> + int32_t power;
> +
> + {
> + int width = LHS->getType()->getScalarSizeInBits();
This should be an unsigned, like the result type of getScalarSizeInBits().
> + APInt mask(width, 0), zeroes(width, 0), ones(width, 0);
> + mask.setAllBits();
An easier way to get an all-one mask would be to construct it as
'APInt mask(width, -1, true)'.
> + Compute...
2011 Mar 06
1
[LLVMdev] First Patch
Hi all!
I've been tinkering with LLVM's code-base for a few days, hoping to
start on one of the ideas mentioned in the "Open Projects" page (I was
told 'Improving the current system'/'Miscellaneous Improvements'/5 would
be a good start).
While I was at it, I also took a stab at finishing up one of the TODOs.
I've attached the patch for review.
--
2011 Mar 02
3
[LLVMdev] live variable analysis
Hi
As I understand live variable analysis will set the def/kill
properties of operands. In that case, is it still needed to set the
kill flags when possible during lowering?
thanks
dz
2015 Aug 19
3
[RFC] Improving integer divide optimization (related to D12082)
Hello LLVM, A recent commit creates the isIntDivCheap() target query.
http://reviews.llvm.org/D12082
The current approach has a couple shortcomings.
First, when targets decide divide is cheap, the DAGCombiner ignores
obvious power-of-2 optimizations. In the targets I know, shifts are
cheaper than divides in both speed and size. The target cannot see
the value in the isIntDivCheap() call, so
2012 Jun 28
1
[LLVMdev] buildbot with -vectorize
...ectorize
compile failures are due to other passes not handling pointer vectors
appropriately. For example, lib/Analysis/ValueTracking.cpp contains
this code:
427 if (SrcTy->isPointerTy())
428 SrcBitWidth = TD->getTypeSizeInBits(SrcTy);
429 else
430 SrcBitWidth = SrcTy->getScalarSizeInBits();
and this does not work for pointer vectors. In this case, the solution
(for the crash, which happens because getScalarSizeInBits returns 0 for
pointer vectors) seems obvious, although fixing it to not crash and
making sure it does the right thing are not equivalent.
I can submit bug reports f...
2010 Oct 26
2
[LLVMdev] StructType member offset
...uct
(including alignment etc)?
This doesn't work :
const StructType *STy = cast<StructType>(Ty);
for (StructType::element_iterator I = STy->element_begin(),
E = STy->element_end(); I != E; ++I)
{
usigned size =I->get()->getScalarSizeInBits(); //often
returns 0, not what I need
}
Basically I want to add up the sizes of the different members to
calculate the offset (which I want to compare to
DIType::getOffsetInBits()). Or if there is a direct way to get the
offset of a struct member without adding their sizes that'd...
2019 Nov 20
4
Tablegen PAT limitation?
Hi,
The full trace stack:
Type set is empty for each HW mode:
possible type contradiction in the pattern below (use -print-records with llvm-tblgen to see all expanded records).
vtInt: (vt:{ *:[Other] })
UNREACHABLE executed at /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:824!
[ 85%] Building X86GenEVEX2VEXTables.inc...
#0 0x000000000081b9b5
2015 Aug 20
2
[RFC] Improving integer divide optimization (related to D12082)
...e; the tricky case is sdiv by power of 2, which takes significantly more than one instruction. The generic implementation is this:
>
> // Splat the sign bit into the register
> SDValue SGN =
> DAG.getNode(ISD::SRA, DL, VT, N0,
> DAG.getConstant(VT.getScalarSizeInBits() - 1, DL,
> getShiftAmountTy(N0.getValueType())));
> AddToWorklist(SGN.getNode());
>
> // Add (N0 < 0) ? abs2 - 1 : 0;
> SDValue SRL =
> DAG.getNode(ISD::SRL, DL, VT, SGN,
> DAG.getConstant(VT.get...
2017 Sep 25
0
What should a truncating store do?
...+ // We assume that vectors with elements smaller than the byte size are
+ // bitpacked. And that elements larger than the byte size should be padded
+ // (e.g. i40 type for Phoenix is stored using 3 bytes (48 bits)).
+ bool PadElementsToByteSize =
+ isVector() && getScalarSizeInBits() >= BitsPerByte;
+ if (PadElementsToByteSize)
+ return getVectorNumElements() * getScalarType().getStoreSize();
+ return (getSizeInBits() + (BitsPerByte-1)) / BitsPerByte;
}
The patch seems to work for in-tree-target tests as well as our out-of-tree target.
If it is a co...
2017 Sep 25
3
What should a truncating store do?
...er than the byte
> size are
>
> + // bitpacked. And that elements larger than the byte size
> should be padded
>
> + // (e.g. i40 type for Phoenix is stored using 3 bytes (48 bits)).
>
> + bool PadElementsToByteSize =
>
> + isVector() && getScalarSizeInBits() >= BitsPerByte;
>
> + if (PadElementsToByteSize)
>
> + return getVectorNumElements() * getScalarType().getStoreSize();
>
> + return (getSizeInBits() + (BitsPerByte-1)) / BitsPerByte;
>
> }
>
> The patch seems to work for in-tree-target tests...
2012 Jun 24
0
[LLVMdev] buildbot with -vectorize
On 06/24/2012 02:42 PM, Hal Finkel wrote:
> On Sun, 24 Jun 2012 08:17:32 +0200
> Tobias Grosser<tobias at grosser.es> wrote:
>
>> On 06/24/2012 05:42 AM, Hal Finkel wrote:
>>> On Thu, 21 Jun 2012 16:25:13 +0200
>>> Tobias Grosser<tobias at grosser.es> wrote:
>>>
>>>> On 06/21/2012 04:23 PM, Hal Finkel wrote:
>>>>>
2010 Nov 03
0
[LLVMdev] StructType member offset
...const StructType *STy = cast<StructType>(Ty);
> > for (StructType::element_iterator I = STy->element_begin(),
> > E = STy->element_end(); I != E; ++I)
> > {
> > usigned size =I->get()->getScalarSizeInBits(); //often
> > returns 0, not what I need
> > }
> >
> > Basically I want to add up the sizes of the different members to
> > calculate the offset (which I want to compare to
> > DIType::getOffsetInBits()). Or if there is a...
2017 Sep 15
2
What should a truncating store do?
They are starting to look complicated. The patch linked is interesting,
perhaps v1 vectors are special cased. It shouldn't be too onerous to work
out what one or two in tree back ends do by experimentation.
Thanks again, it's great to have context beyond the source.
On Fri, Sep 15, 2017 at 9:41 PM, Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 9/15/2017 12:10 PM, Jon
2012 Jun 24
3
[LLVMdev] buildbot with -vectorize
On Sun, 24 Jun 2012 08:17:32 +0200
Tobias Grosser <tobias at grosser.es> wrote:
> On 06/24/2012 05:42 AM, Hal Finkel wrote:
> > On Thu, 21 Jun 2012 16:25:13 +0200
> > Tobias Grosser<tobias at grosser.es> wrote:
> >
> >> On 06/21/2012 04:23 PM, Hal Finkel wrote:
> >>> On Thu, 21 Jun 2012 01:03:46 +0200
> >>> Tobias
2011 Mar 08
0
[LLVMdev] First Patch
...n-zero bit in a more significant place than it (not including the
> // sign bit) the ripple may go up to and fill the zero, but won't change the
> // sign. For example, (X & ~4) + 1.
> -
> - // TODO: Implement.
> -
> +
> + unsigned width = LHS->getType()->getScalarSizeInBits();
> + APInt mask(width, -1, true), LHSKnownZero(width, 0), LHSKnownOne(width, 0),
> + RHSKnownZero(width, 0), RHSKnownOne(width, 0);
> +
> + ComputeMaskedBits(LHS, mask, LHSKnownZero, LHSKnownOne);
> + ComputeMaskedBits(RHS, mask, RHSKnownZero, RHSKnownOne);
> +
> + if...
2011 Mar 08
2
[LLVMdev] First Patch
Hi!
I've attached a patch which takes care of the issues mentioned (and adds
two tests).
--
Sanjoy Das
http://playingwithpointers.com
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2017 Sep 25
0
What should a truncating store do?
...+ // We assume that vectors with elements smaller than the byte size are
+ // bitpacked. And that elements larger than the byte size should be padded
+ // (e.g. i40 type for Phoenix is stored using 3 bytes (48 bits)).
+ bool PadElementsToByteSize =
+ isVector() && getScalarSizeInBits() >= BitsPerByte;
+ if (PadElementsToByteSize)
+ return getVectorNumElements() * getScalarType().getStoreSize();
+ return (getSizeInBits() + (BitsPerByte-1)) / BitsPerByte;
}
The patch seems to work for in-tree-target tests as well as our out-of-tree target.
If it is a co...
2018 Apr 10
1
64 bit mask in x86vshuffle instruction
...sk[15] < 0 ? 15 : Mask[15]) << 30;
return Imm;
}
static SDValue lowerV16X128VectorShuffle(const SDLoc &DL, MVT VT,
ArrayRef<int> Mask, SDValue V1,
SDValue V2, SelectionDAG &DAG) {
assert(VT.getScalarSizeInBits() == 64 &&
"Unexpected element type size for 128bit shuffle.");
// To handle 256 bit vector requires VLX and most probably
// function lowerV2X128VectorShuffle() is better solution.
assert(VT.is2048BitVector() && "Unexpected vector size for 2048bit
sh...
2010 Oct 26
0
[LLVMdev] llvm-dis fails to parse bytecode emitted by clang
Hi,
For the first problem, try
clang -S -emit-llvm test.c -o test.ll
you should get the llvm IR and you don't need to use llvm-dis. Although I
have tried your example with the exact commands and source code you posted
and it worked just fine for me. I also use clang and LLVM 2.8 compiled from
sources.
For the second problem, suppress -emit-llvm, since you want the executable,
not an object