search for: getregisterbitwidth

Thank You. Right now to see the effect i did following changes; unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) { if (Vector) { if (ST->hasAVX512()) return 65536; here i changed 512 to 65536. Then in loopvectorize.cpp i did following; assert(MaxVectorSize <= 2048 && "Did not expect to pack so many elements" " into one ve...

Thank You. I got it. Version issue. TTI.getRegisterBitWidth(true) How to put my target machine info in TTI? Please help. On Mon, Jul 23, 2018 at 11:33 PM, Friedman, Eli <efriedma at codeaurora.org> wrote: > On 7/23/2018 10:49 AM, hameeza ahmed via llvm-dev wrote: > > Thank You. > > But I cannot find your mentioned function LoopVecto...

...e.com> wrote: > Hi Rail, > > Two hints to begin with: > > 1) Makes sure you example is vectorized on X86 for example > 2) Is your target correctly overriding the TTI (declaring the vector > register size for example) so that the vectorizer can kicks-in (see > X86TTIImpl::getRegisterBitWidth for instance). Alternatively you can test > the SLP vectorizer by passing to clang: -mllvm -slp-max-reg-size -mllvm 512 > (I don't see an equivalent option for the loop vectorizer though). > > Well, it sort of worked. I added a getRegisterBitWidth(...) but then I got this error: f...

...return 512; > } > return 256; > > > please help... > > On Tue, Jul 24, 2018 at 5:05 AM, hameeza ahmed <hahmed2305 at gmail.com> > wrote: > >> Thank You. >> Right now to see the effect i did following changes; >> >> unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) { >> if (Vector) { >> if (ST->hasAVX512()) >> return 65536; >> >> here i changed 512 to 65536. Then in loopvectorize.cpp i did following; >> >> assert(MaxVectorSize <= 2048 && "Did not expect to pack so many elem...

...il, >> >> Two hints to begin with: >> >> 1) Makes sure you example is vectorized on X86 for example >> 2) Is your target correctly overriding the TTI (declaring the vector >> register size for example) so that the vectorizer can kicks-in (see >> X86TTIImpl::getRegisterBitWidth for instance). Alternatively you can test >> the SLP vectorizer by passing to clang: -mllvm -slp-max-reg-size -mllvm 512 >> (I don't see an equivalent option for the loop vectorizer though). >> >> Well, it sort of worked. I added a getRegisterBitWidth(...) but then I &g...

Dear LLVM contributors, I work on the "Improvement of vectorization process in Polly". At the moment I'm trying to implement tiling, interchanging and unrolling of specific loops based on the following algorithm for the analytical modeling [1]. It requires information about the following parameters of a target architecture: 1. Size of double-precision floating-point number. 2.

..., 2013, at 12:36 PM, Renato Golin <renato.golin at linaro.org> wrote: > On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> wrote: > Agreed, is there a pass that will insert a runtime alignment check? Also, what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() so I don't have to hard code 32? Thanks! > > I think that's a fair question, and it's about safety. If you're getting this on the JIT, means we may be generating unsafe transformations on the vectorizer. > > Arnold, Nadav, I don't remember seeing code to generate...

Agreed, is there a pass that will insert a runtime alignment check? Also, what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() so I don't have to hard code 32? Thanks! -Josh On Fri, Nov 15, 2013 at 3:20 PM, Frank Winter <fwinter at jlab.org> wrote: > Hmm.. I don't quite understand. How can a module validator > catch this, when it's the pointers, i.e. the payload, you pass > as function argu...

...for this? > > > I believe that the thing that you're trying to affect is this: > > LoopVectorizationCostModel::computeFeasibleMaxVF(bool OptForSize, > unsigned ConstTripCount) > { > ... > unsigned WidestRegister = TTI.getRegisterBitWidth(true); > > > and so your target's TargetTransformInfo class should return an > appropriate value from getRegisterBitWidth. > > -Hal > > > > Please help > > Thank You > Regards > > > > > _______________________________________________ > L...

...with: >>>> >>>> 1) Makes sure you example is vectorized on X86 for example >>>> 2) Is your target correctly overriding the TTI (declaring the vector >>>> register size for example) so that the vectorizer can kicks-in (see >>>> X86TTIImpl::getRegisterBitWidth for instance). Alternatively you can test >>>> the SLP vectorizer by passing to clang: -mllvm -slp-max-reg-size -mllvm 512 >>>> (I don't see an equivalent option for the loop vectorizer though). >>>> >>>> Well, it sort of worked. I added a getReg...

...Golin <renato.golin at linaro.org> > wrote: > > On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> wrote: > >> Agreed, is there a pass that will insert a runtime alignment check? Also, >> what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() >> so I don't have to hard code 32? Thanks! >> > > I think that's a fair question, and it's about safety. If you're getting > this on the JIT, means we may be generating unsafe transformations on the > vectorizer. > > Arnold, Nadav, I don't rememb...

My question is: How do I make clang to generate assembly with vector instruction for my target? The back story is: I've added a few vector instructions to my target and confirmed that they are used by running my code on the test below and using a following command: opt i.esencia.ll -S -march=esencia -mcpu=esencia -loop-vectorize | llc -mcpu=esencia -o i.esencia.s target datalayout =

...etFeatures in X86.td not mapped to any CPU. -Add mprefer-avx256 and mprefer-avx128 and the corresponding -mno-prefer-avx128/256 options to clang's driver Options.td file. I believe this will allow clang to pass these straight through to the -target-feature attribute in IR. -Modify X86TTIImpl::getRegisterBitWidth to only return 512 if AVX512 is enabled and prefer-avx256 and prefer-avx128 is not set. Similarly return 256 if AVX is enabled and prefer-avx128 is not set. There may be some other backend changes needed, but I plan to address those as we find them. At a later point, consider making -mprefer-a...

...:36 PM, Renato Golin <renato.golin at linaro.org> wrote: > >> On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> wrote: >> Agreed, is there a pass that will insert a runtime alignment check? Also, what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() so I don't have to hard code 32? Thanks! >> >> I think that's a fair question, and it's about safety. If you're getting this on the JIT, means we may be generating unsafe transformations on the vectorizer. >> >> Arnold, Nadav, I don't remember seeing...

On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> wrote: > Agreed, is there a pass that will insert a runtime alignment check? Also, > what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() > so I don't have to hard code 32? Thanks! > I think that's a fair question, and it's about safety. If you're getting this on the JIT, means we may be generating unsafe transformations on the vectorizer. Arnold, Nadav, I don't remember seeing code to generate any run-t...

...:36 PM, Renato Golin <renato.golin at linaro.org> wrote: > >> On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> wrote: >> Agreed, is there a pass that will insert a runtime alignment check? Also, what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() so I don't have to hard code 32? Thanks! >> >> I think that's a fair question, and it's about safety. If you're getting this on the JIT, means we may be generating unsafe transformations on the vectorizer. >> >> Arnold, Nadav, I don't remember seeing...

...ber 2013 20:24, Joshua Klontz <josh.klontz at gmail.com >> <mailto:josh.klontz at gmail.com>> wrote: >> >> Agreed, is there a pass that will insert a runtime alignment >> check? Also, what's the easiest way to get at >> TargetTransformInfo::getRegisterBitWidth() so I don't have to >> hard code 32? Thanks! >> >> >> I think that's a fair question, and it's about safety. If you're >> getting this on the JIT, means we may be generating unsafe >> transformations on the vectorizer. >> >> Arn...

...rote: > > > >> On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> > >> wrote: > >> Agreed, is there a pass that will insert a runtime alignment > >> check? Also, what's the easiest way to get at > >> TargetTransformInfo::getRegisterBitWidth() so I don't have to > >> hard code 32? Thanks! > >> > >> I think that's a fair question, and it's about safety. If you're > >> getting this on the JIT, means we may be generating unsafe > >> transformations on the vectorizer. > >&...

...>>>> On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> >>>> wrote: >>>> Agreed, is there a pass that will insert a runtime alignment >>>> check? Also, what's the easiest way to get at >>>> TargetTransformInfo::getRegisterBitWidth() so I don't have to >>>> hard code 32? Thanks! >>>> >>>> I think that's a fair question, and it's about safety. If you're >>>> getting this on the JIT, means we may be generating unsafe >>>> transformations on the vectori...

...ato Golin <renato.golin at linaro.org> wrote: >> >>> On 15 November 2013 20:24, Joshua Klontz <josh.klontz at gmail.com> wrote: >>> Agreed, is there a pass that will insert a runtime alignment check? Also, what's the easiest way to get at TargetTransformInfo::getRegisterBitWidth() so I don't have to hard code 32? Thanks! >>> >>> I think that's a fair question, and it's about safety. If you're getting this on the JIT, means we may be generating unsafe transformations on the vectorizer. >>> >>> Arnold, Nadav, I don't re...