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The method below takes in a register and returns a register. To me this makes no sense because when I already have a register, why would I need to get it? Could someone please explain the transformation that is happening here? /// getRegister - Return the specified register in the class. /// unsigned getRegister(unsigned i) const { assert(i < getNumRegs() && "Register number out of range!"); return RegsBegin[i]; } -------------- next part -------------- An HTML attachment was scrubbed... URL: <htt...

Thank you for your help. I think I managed to create the instruction I wanted: // mov eax, 41 Chain = DAG.getCopyToReg(Chain, DAG.getRegister(X86::EAX, MVT::i32), DAG.getConstant(41, MVT::i32), InFlag); InFlag = Chain.getValue(1); I don't understand though what InFlag is for. As I read the code, it even remains uninitialized when first passed to some node creation method. Unfortunately I still don't manage to create more so...

Sorry to ask again, but I still can't get it right. The following code compiles and runs, but produces no instructions: Ops.push_back(DAG.getRegister(X86::EAX, MVT::i32)); Ops.push_back(DAG.getConstant(1, MVT::i32)); DAG.getNode(ISD::ADD, DAG.getVTList(MVT::i32), &Ops[0], Ops.size()); I reckon that has something to do with the fact that I am not using the Chain object. But as soon as I try to chain that node, llc tells me that I have...

Aye, I understand it's an index into an array, but what is the difference between the index i and the return value. Do I have to worry that register values from a TargetRegisterClass could be either zero based or some other base? Are there other methods that rely on zero based in the TargetRegisterClass? I thought register values were "global," but this transformation makes a register value dependent on it's TargetRegisterClass. Basically, I find it confu...

...es, i. e. in my example, MVT::Other says that a Chain object will be returned? Now, as soon as I try to generate more complex instructions, I get lost. Say, I want to insert the following instruction mov eax, 42 then the best I can come up with is Ops.push_back(Chain); Ops.push_back(DAG.getRegister(X86::EAX, MVT::i32)); Ops.push_back(DAG.getConstant(42, MVT::i32)); Chain = DAG.getNode(X86::MOV32ri, DAG.getVTList(MVT::Other), &Ops[0], Ops.size()); But there are a few problems: 3) It seems I am not allowed to use concrete X86 instructions here (at least that's what I think llc...

Thanks to your help I've actually made some progress... Especially the SelectionDAGNodes.h was a good hint. But there are still some things that I can't figure out: // 'mov eax, 41' Chain = DAG.getCopyToReg(Chain, DAG.getRegister(X86::EAX, MVT::i32), DAG.getConstant(41, MVT::i32), InFlag); InFlag = Chain.getValue(1); // 'inc eax' SDValue eaxVal = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32); SDValue inc = DAG.getNode(ISD::ADD, MVT::i32, eaxVal, DAG.getConstant(1, MVT::i32)); InFlag = SDValue(); Chai...

On Jul 1, 2009, at 2:22 PMPDT, Dan Gohman wrote: >> Ops.push_back(DAG.getConstant(1, MVT::i32)); >> Chain = DAG.getNode(ISD::ADD, DAG.getVTList(MVT::Other, MVT::i32), >> &Ops[0], Ops.size()); >> >> Isn't that the way how it is supposed to work? > > ADD does not use a chain, so there's no chain operand, or > MVT::Other result for it in an ADD

...ill be returned?' Yes. > > Now, as soon as I try to generate more complex instructions, I get > lost. > Say, I want to insert the following instruction > > mov eax, 42 > > then the best I can come up with is > > Ops.push_back(Chain); > Ops.push_back(DAG.getRegister(X86::EAX, MVT::i32)); > Ops.push_back(DAG.getConstant(42, MVT::i32)); > Chain = DAG.getNode(X86::MOV32ri, DAG.getVTList(MVT::Other), &Ops[0], > Ops.size()); > > But there are a few problems: > 3) It seems I am not allowed to use concrete X86 instructions here > (at le...

On Jun 26, 2009, at 4:49 AM, Artjom K. wrote: > > Thank you for your help. > > I think I managed to create the instruction I wanted: > > // mov eax, 41 > Chain = DAG.getCopyToReg(Chain, DAG.getRegister(X86::EAX, MVT::i32), > DAG.getConstant(41, MVT::i32), InFlag); > InFlag = Chain.getValue(1); > > I don't understand though what InFlag is for. As I read the code, it > even > remains uninitialized when first passed to some node creation method. Flag operands in Selection...

Thx again Evan for the review. Here's a new patch for the JIT in itself. The major changes are: 1) A JITMemoryManager now has a flag saying "I require to know the size of what you want to emit" 2) DwarfJITEmitter is augmented with GetSize* functions 3) JITEmitter::startFunction checks if the JITMemoryManager requires to know the size. If so, it computes it and gives it through the

On Jun 29, 2009, at 9:00 AM, Artjom Kochtchi wrote: > > Sorry to ask again, but I still can't get it right. > > The following code compiles and runs, but produces no instructions: > Ops.push_back(DAG.getRegister(X86::EAX, MVT::i32)); > Ops.push_back(DAG.getConstant(1, MVT::i32)); > DAG.getNode(ISD::ADD, DAG.getVTList(MVT::i32), &Ops[0], Ops.size()); To read the value of a physical register, a CopyFromReg node is needed. > > I reckon that has something to do with the fact that I am not...

...code. I assume you have something like the PPC backend right now. If so, you have this in your lowering code: // Add argument registers to the end of the list so that they are known live // into the call. for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) Ops.push_back(DAG.getRegister(RegsToPass[i].first, RegsToPass[i].second.getValueType())); if (InFlag.Val) Ops.push_back(InFlag); Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size()); This creates a call node with a list of input registers, these are marked as uses. In...

...TargetMachine &TM; > + MachineCodeEmitter& MCE; > + const MRegisterInfo* RI; > + > + public: > + DwarfJITEmitter(MachineCodeEmitter &mce, const TargetData& td, > + TargetMachine& tm) : TD(td), TM(tm), MCE(mce) { > + RI = TM.getRegisterInfo(); > + MemMgr = JITMemoryManager::CreateDefaultMemManager(); > + } > + > + unsigned char* EmitExceptionTable(MachineFunction* MF, > + unsigned char* StartFunction, > + unsigned char* EndFunc...

...> + MachineCodeEmitter& MCE; >> + const MRegisterInfo* RI; >> + >> + public: >> + DwarfJITEmitter(MachineCodeEmitter &mce, const TargetData& td, >> + TargetMachine& tm) : TD(td), TM(tm), MCE(mce) { >> + RI = TM.getRegisterInfo(); >> + MemMgr = JITMemoryManager::CreateDefaultMemManager(); >> + } >> + >> + unsigned char* EmitExceptionTable(MachineFunction* MF, >> + unsigned char* StartFunction, >> +...

Hi everyone, Here's a patch that enables exception handling when jitting. I've copy/pasted _many_code from lib/Codegen/DwarfWriter.cpp, so we may need to factorize it, but the functionality is there and I'm very happy with it :) lli should now be able to execute the output from llvm-gcc when using exceptions (the UnwindInst instruction is not involved in this patch). Just add the

...RetOps.push_back(Chain); // Operand #0 = Chain (updated below) // Operand #1 = Bytes To Pop @@ -1666,6 +1659,7 @@ X86TargetLowering::LowerReturn(SDValue Chain, Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag); Flag = Chain.getValue(1); + RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); } // The x86-64 ABIs require that for returning structs by value we copy @@ -1686,7 +1680,7 @@ X86TargetLowering::LowerReturn(SDValue Chain, Flag = Chain.getValue(1); // RAX/EAX now acts like a return value. - MRI.addLiveOut(RetValReg); +...

Hi Chris, Thanks for your response. > On Sat, 14 Oct 2006, Roman Levenstein wrote: > > Is it possible to dynamically define implicit defs for some > > instructions? > > Yes! This is what explicit operands are :). Specifically, if you > want to > vary on a per-opcode basis what registers are used/def'd by the > instruction, you can just add those registers

...t; EndFunction) { > + const TargetMachine& TM = F.getTarget(); > + TD = TM.getTargetData(); > + needsIndirectEncoding = TM.getTargetAsmInfo()- > >getNeedsIndirectEncoding(); > + stackGrowthDirection = TM.getFrameInfo()- > >getStackGrowthDirection(); > + RI = TM.getRegisterInfo(); > + MCE = &mce; > + > + unsigned char* ExceptionTable = EmitExceptionTable(&F, > StartFunction, > + EndFunction); > + > + unsigned char* Result = 0; > + unsigned char* EHFramePtr = 0; > + > + c...

Dear all, Here's a new patch with Evan's comments (thx Evan!) and some cleanups. Now the (duplicated) exception handling code is in a new file: lib/ExecutionEngine/JIT/JITDwarfEmitter. This patch should work on linux/x86 and linux/ppc (tested). Nicolas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: jit-exceptions.patch URL:

...DOperand OpsTailCall [] = {AdjStackChain, RetNode.getOperand(1), RetNode.getOperand(2)}; RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall,3); would then be replaced by Chain = DAG.getCopyToReg(AdjStackChain, X86::ECX, RetNode.getOperand (1)); SDOperand OpsTailCall [] = {Chain,DAG.getRegister(X86::ECX, getPointerTy())), RetNode.getOperand(2)}; RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall, 3); the downside here is that ECX is no longer free for passing function arguments. (i am using the x86_fastcall semantics at the moment with first two arguments stored in ec...