search for: getreginfo

Thanks Lang! Here's another question: I'm trying to process this input: int main() { return 0; } but I'm getting an error Assertion `!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs"' failed. At the start of runOnMachineFunction I call Fn.getRegInfo().getNumVirtRegs(); and find that there is 1 virtual register. However, MRI->reg_empty(vreg) tells me that it is not used or defined. So my regist...

...ers, Lang. On Wed, Oct 31, 2012 at 3:54 PM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > Thanks Lang! > > Here's another question: I'm trying to process this input: > > int main() { > return 0; > } > > but I'm getting an error > Assertion `!Fn.getRegInfo().**getNumVirtRegs() && "Regalloc must assign > all vregs"' failed. > > At the start of runOnMachineFunction I call Fn.getRegInfo().** > getNumVirtRegs(); > and find that there is 1 virtual register. However, MRI->reg_empty(vreg) > tells me that it is no...

...there are two issues: 1) I need to registers and RegScavenger only returns one. 2) I cannot unset the used register and I get spill slot error message when I ran out of the available registers. So I gave up and tried createVirtualRegister(): MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo(); const TargetRegisterClass *RC = &LASER::GNPRegsRegClass; unsigned Reg = RegInfo.createVirtualRegister(RC); But then I get the following error: MachineCopyPropagation.cpp:267: void anonymous}::MachineCopyPropagation::CopyPropagateBlock(llvm::MachineBasicBlock&): Assertion `!TargetRegist...

...wisc.edu > <mailto:horwitz at cs.wisc.edu>> wrote: > > Thanks Lang! > > Here's another question: I'm trying to process this input: > > int main() { > return 0; > } > > but I'm getting an error > Assertion `!Fn.getRegInfo(). getNumVirtRegs() && "Regalloc must > assign all vregs"' failed. > > At the start of runOnMachineFunction I call Fn.getRegInfo(). > getNumVirtRegs(); > and find that there is 1 virtual register. However, > MRI->reg_empty(vreg) >...

Hi, I wanted to see the non-debug uses of register 0 (Noreg) and so, I wrote the following piece of code. ***** MRI = &MF.getRegInfo(); if (!MRI->use_nodbg_empty(0)) { for (MachineRegisterInfo::use_nodbg_iterator ri = MRI->use_nodbg_begin(0), re = MRI->use_nodbg_end(); ri != re; ++ri) { MachineInstr *UseMI = &*ri; UseMI->dump (); } } ***** But I see that UseMI is...

...like a MCStreamer for assembler output. At the moment I can compile some empty programs so far. I implemented the method ::eliminateFrameIndex() similar to the Sparc and ARM backend. The method looks like this: // frame pointer is in reg of class mytarget::ARegsRegClass unsigned ScratchReg = MF.getRegInfo().createVirtualRegister(&mytarget::ARegsRegClass); const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); BuildMI(*MI.getParent(), II, dl, TII.get(mytarget::ADD_AReg), ScratchReg).addReg(FramePtr).addImm(Offset); // Update the original instruction to use the scratch register. MI.getOp...

Chris Lattner wrote: > > I'm not sure I understand this logic. If we have "1 + 2" as constant > > expression, then why emit the code to perform addition? It should be > > possible to just fold the expression and copy immediate "3" into a > > register. > > > > I must be missing something, but what? > > LLVM constant expressions are

...creates a virtual register > instead of using R0. How does this look? > > Cheers, > Gary > > Dan Gohman wrote: >> PPCTargetLowering::EmitInstrWithCustomInserter has a reference >> to the current MachineFunction for other purposes. Can you use >> MachineFunction::getRegInfo instead? >> >> Dan >> >> On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: >>> Would it be acceptable to change MachineInstr::getRegInfo >>> from private to public so I can use it from >>> PPCTargetLowering::EmitInstrWithCustomInserter? >>> &...

Hi all, I was looking at the register allocator code and had a question about that: CodeGen/RegAlloc/PhysRegAlloc.cpp implements a graph coloring register allocator for the Sparc back end. It requests target machine register information via a call to getRegInfo() which returns a class TargetRegInfo containing the required information. For the x86 target machine, this interface has not been implemented. Is an implementation of a x86-specific TargetRegInfo class the only piece of the puzzle missing for a graph coloring x86 allocator? Or are there other...

Hi, I am confused about the call to isPhyRegUsed in calculateCalleeSavedRegisters: if (Fn.getRegInfo().isPhysRegUsed(Reg)) { // If the reg is modified, save it! CSI.push_back(CalleeSavedInfo(Reg)); } It seems that isPhyRegUsed returns true if the register is read or written in the function. If this is right, why do we save a register if it is only read in the function ?? I would have expect...

...edu>> wrote: >> >> Thanks Lang! >> >> Here's another question: I'm trying to process this input: >> >> int main() { >> return 0; >> } >> >> but I'm getting an error >> Assertion `!Fn.getRegInfo(). getNumVirtRegs() && "Regalloc must >> >> assign all vregs"' failed. >> >> At the start of runOnMachineFunction I call Fn.getRegInfo(). >> getNumVirtRegs(); >> and find that there is 1 virtual register. However, >>...

Would it be acceptable to change MachineInstr::getRegInfo from private to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter? Cheers, Gary Evan Cheng wrote: > Look for createVirtualRegister. These are examples in > PPCISelLowering.cpp. > > Evan > On Jul 8, 2008, at 8:24 AM, Gary Benson wrote: > > > Hi...

...> > Thanks Lang! > > Here's another question: I'm trying to process this input: > > int main() { > return 0; > } > > but I'm getting an error > Assertion `!Fn.getRegInfo(). getNumVirtRegs() && > "Regalloc must > > assign all vregs"' failed. > > At the start of runOnMachineFunction I call Fn.getRegInfo(). > getNumVirtRegs(); > and find that there is 1 virtual regis...

...ement the "LowerReturn" function, and it can return correctly. The code snippet may be as follows: ... CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); TLI.analyzeOutputArgs(MF, CCInfo, Outs, true, nullptr); RISCVValueHandler RetHandler(MIRBuilder, MF.getRegInfo(), Ret); RetHandler.handleArg(ArgLocs, RetInfos); ... In order to reduce duplicated code as much as possible, and reuse part of code from "TargetLowering" for GlobalIsel, the access specifiers for some functions in RISCVTargetLowering need be changed, like "analyzeOutputArgs&quot...

Hi Susan, The meaning of "addRequired(X)" is that your pass needs X to be run, and for X to be preserved by all passes that run after X and before your pass. The PHIElemination and TwoAddressInstruction passes do not preserve each other, hence there's no way for the pass manager to schedule them for you if you addRequire(...) them. The trick is that CodeGen will schedule both of

PPCTargetLowering::EmitInstrWithCustomInserter has a reference to the current MachineFunction for other purposes. Can you use MachineFunction::getRegInfo instead? Dan On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: > Would it be acceptable to change MachineInstr::getRegInfo from private > to public so I can use it from > PPCTargetLowering::EmitInstrWithCustomInserter? > > Cheers, > Gary >

I'm trying to write a MachineFunctionPass to do register allocation. I have code that worked with an old version of LLVM. It does not work with llvm-3.1. (or various other versions that I've tried). The first problem is that including this line: AU.addRequiredID(TwoAddressInstructionPassID); in method getAnalysisUsage causes a runtime error: Unable to schedule 'Eliminate PHI

...m :) I attached an updated patch which creates a virtual register instead of using R0. How does this look? Cheers, Gary Dan Gohman wrote: > PPCTargetLowering::EmitInstrWithCustomInserter has a reference > to the current MachineFunction for other purposes. Can you use > MachineFunction::getRegInfo instead? > > Dan > > On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: > > Would it be acceptable to change MachineInstr::getRegInfo > > from private to public so I can use it from > > PPCTargetLowering::EmitInstrWithCustomInserter? > > > > Cheers, > >...

...>> >> Here's another question: I'm trying to process this input: >> >> int main() { >> return 0; >> } >> >> but I'm getting an error >> Assertion `!Fn.getRegInfo(). getNumVirtRegs() && >> "Regalloc must >> >> assign all vregs"' failed. >> >> At the start of runOnMachineFunction I call Fn.getRegInfo(). >> getNumVirtRegs(); >> and find t...

...etInstrInfo::isReallyTriviallyReMaterializableGeneric and code for same is here: bool TargetInstrInfo::isReMaterializablePossible( const MachineInstr &MI, AliasAnalysis *AA) const { const MachineFunction &MF = *MI.getParent()->getParent(); const MachineRegisterInfo &MRI = MF.getRegInfo(); // Remat clients assume operand 0 is the defined register. if (!MI.getNumOperands() || !MI.getOperand(0).isReg()) return false; unsigned DefReg = MI.getOperand(0).getReg(); // A sub-register definition can only be rematerialized if the instruction // doesn't read the other pa...