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2013 May 19
1
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...ister-like was found is used downstream. For grins I tried
eliminating the code to check for register-ness and found that both the
X86 and ARM targets failed to build. The .inc file was built for X86,
but the generated code was nonsensical for certain kinds of patterns
(function names containing .getPtrType() as a substring, etc.). ARM
couldn't build the .inc file at all due to duplicate patterns.
So I think we have to specifically recognize ValueTypes. To keep things
simple, we could pass in the destination register class from
collectPatterns, which has the output register class of the destin...
2013 May 17
0
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
On May 17, 2013, at 2:04 PM, Bill Schmidt <wschmidt at linux.vnet.ibm.com> wrote:
> Hello,
>
> In http://llvm.org/viewvc/llvm-project?view=revision&revision=177889 and
> http://llvm.org/viewvc/llvm-project?view=revision&revision=177890 (along
> with some follow-up patches) the PowerPC back end was changed to use
> types instead of register classes in instruction
2013 May 17
2
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
Hello,
In http://llvm.org/viewvc/llvm-project?view=revision&revision=177889 and
http://llvm.org/viewvc/llvm-project?view=revision&revision=177890 (along
with some follow-up patches) the PowerPC back end was changed to use
types instead of register classes in instruction patterns. This matched
similar changes that Jakob made for Sparc in r177835.
I've recently come across an