Displaying 20 results from an estimated 22 matches for "getprogram".
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get_program
2017 Aug 11
2
[PATCH] nv50/ir: Initialize all members of GCRA (trivial)
...p b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 9d70ec3c9c..e4f38c8e46 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -1146,6 +1146,9 @@ GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
regs(fn->getProgram()->getTarget()),
spill(spill)
{
+ nodeCount = 0;
+ nodes = NULL;
+
prog = func->getProgram();
// initialize relative degrees array - i takes away from j
--
2.14.0
2017 Dec 30
1
[PATCH v2] nv50/ir: Initialize all members of GCRA (trivial)
...918a161..a70a54f6b8 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -1144,7 +1144,9 @@ GCRA::RIG_Node::addRegPreference(RIG_Node *node)
GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
func(fn),
regs(fn->getProgram()->getTarget()),
- spill(spill)
+ spill(spill),
+ nodeCount(0),
+ nodes(NULL)
{
prog = func->getProgram();
--
2.15.1
2014 Jun 03
8
[PATCH v2 0/4] Constant folding of new Instructions
And another try for constant folding of Instructions for nvc0.
Please Review this!
Thanks,
Tobias Klausmann
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant expressions
2017 Dec 29
0
[PATCH] nv50/ir: Initialize all members of GCRA (trivial)
...ouveau/codegen/nv50_ir_ra.cpp
> index 9d70ec3c9c..e4f38c8e46 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> @@ -1146,6 +1146,9 @@ GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
> regs(fn->getProgram()->getTarget()),
> spill(spill)
> {
> + nodeCount = 0;
> + nodes = NULL;
> +
> prog = func->getProgram();
>
> // initialize relative degrees array - i takes away from j
> --
> 2.14.0
>
> _______________________________________________
&...
2014 Sep 25
0
[PATCH] nv50/ir: avoid deleting pseudo instructions too early
...);
++d) {
Value *slot = mem ?
@@ -1579,7 +1585,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
d = lval->defs.erase(d);
--d;
if (slot->reg.file == FILE_MEMORY_LOCAL)
- delete_Instruction(func->getProgram(), defi);
+ to_del.insert(defi);
else
defi->setDef(0, slot);
} else {
@@ -1587,6 +1593,9 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
}
}
+ for (std::tr1::unordered_set<Instruction *>::cons...
2015 Jan 13
3
nv50/ir: Implement short notation for MAD V2
V2: clarify code, commit msgs, add comments. Drop code to was supposed to
make register assignment prefer SDST == SRC2 (patch 2) for now, because it
didn't quite do what I intended.
2015 Jan 23
3
[PATCH 1/2] nv50/ir: Add support for MAD short+IMM notation
Add emission rules for negative and saturate flags for MAD 4-byte opcodes,
and get rid of constraints. Short MAD has a very specific SDST == SSRC2
requirement, and since MAD IMM is short notation + 4-byte immediate, don't
have the compiler create MAD IMM instructions yet.
V2: Document MAD as supported short form
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
2014 Jun 03
0
[PATCH v2 4/4] nvc0/ir: Handle OP_POPCNT when folding constant expressions
...ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
i->subOp = 0;
break;
}
+ case OP_POPCNT: {
+ uint32_t res;
+ if (!i->srcExists(1)) {
+ res = util_bitcount(imm0.reg.data.u32);
+ i->setSrc(0, new_ImmediateValue(i->bb->getProgram(), res));
+ i->setSrc(1, NULL);
+ i->op = OP_MOV;
+ i->subOp = 0;
+ }
+ break;
+ }
default:
return;
}
--
1.8.4.5
2014 Jun 03
0
[PATCH v2 3/4] nvc0/ir: Handle OP_BFIND when folding constant expressions
...) - 1; break;
+ case TYPE_U32:
+ res = util_last_bit(imm0.reg.data.u32) -1; break;
+ default:
+ return;
+ }
+ if ((i->subOp == NV50_IR_SUBOP_BFIND_SAMT) && (res >= 0))
+ res = 31 - res;
+ i->setSrc(0, new_ImmediateValue(i->bb->getProgram(), (uint32_t)res));
+ i->setSrc(1, NULL);
+ i->op = OP_MOV;
+ i->subOp = 0;
+ break;
+ }
default:
return;
}
--
1.8.4.5
2015 Jan 11
0
[PATCH 3/3] nv50/ir: Fold IMM into MAD
...nsn();
+ if (def->op == OP_MOV && def->src(0).getFile() == FILE_IMMEDIATE) {
+ vtmp = i->getSrc(1);
+ i->setSrc(1, def->getSrc(0));
+ if (vtmp->refCount() == 0)
+ delete_Instruction(bb->getProgram(), def);
+ break;
+ }
+
+ vtmp = i->getSrc(0);
+ i->setSrc(0, i->getSrc(1));
+ i->setSrc(1, vtmp);
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return true;
+}
+...
2015 Jan 13
0
[PATCH 2/3] nv50/ir: Fold IMM into MAD
...here's no post-RA dead code elimination, so do it here
+ * XXX: if we add more code-removing post-RA passes, we might
+ * want to create a post-RA dead-code elim pass */
+ if (vtmp->refCount() == 0)
+ delete_Instruction(bb->getProgram(), def);
+
+ break;
+ }
+
+ /* Swap inputs, IMM must be SRC1 */
+ vtmp = i->getSrc(0);
+ i->setSrc(0, i->getSrc(1));
+ i->setSrc(1, vtmp);
+ }
+ break;
+ default:
+ break;
+ }
+ }
+...
2015 Jan 23
0
[PATCH 2/2] nv50/ir: Fold IMM into MAD
.../* There's no post-RA dead code elimination, so do it here
+ * XXX: if we add more code-removing post-RA passes, we might
+ * want to create a post-RA dead-code elim pass */
+ if (vtmp->refCount() == 0)
+ delete_Instruction(bb->getProgram(), def);
+
+ break;
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return true;
+}
+
+// =============================================================================
+
// Common subexpression elimination. Stupid O^2 implementation.
class LocalCSE :...
2015 Feb 06
0
[PATCH 3/3] nv50/ir: Fold IMM into MAD
.../* There's no post-RA dead code elimination, so do it here
+ * XXX: if we add more code-removing post-RA passes, we might
+ * want to create a post-RA dead-code elim pass */
+ if (vtmp->refCount() == 0)
+ delete_Instruction(bb->getProgram(), def);
+
+ break;
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return true;
+}
+
+// =============================================================================
+
// Common subexpression elimination. Stupid O^2 implementation.
class LocalCSE :...
2015 Mar 25
0
[PATCH] nv50/ir: take postFactor into account when doing peephole optimizations
...64; break;
case TYPE_S32:
if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
@@ -579,6 +581,7 @@ ConstantFolding::expr(Instruction *i,
i->src(0).mod = Modifier(0);
i->src(1).mod = Modifier(0);
+ i->postFactor = 0;
i->setSrc(0, new_ImmediateValue(i->bb->getProgram(), res.data.u32));
i->setSrc(1, NULL);
@@ -682,7 +685,7 @@ ConstantFolding::tryCollapseChainedMULs(Instruction *mul2,
Instruction *insn;
Instruction *mul1 = NULL; // mul1 before mul2
int e = 0;
- float f = imm2.reg.data.f32;
+ float f = imm2.reg.data.f32 * exp2f(mul2->post...
2015 Jan 11
6
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
MAD IMM has a very specific SDST == SSRC2 requirement, so don't emit
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
.../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 18 ++++++++++++------
.../drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +-
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
2015 Feb 06
2
[PATCH 1/3] nv50/ir: Add support for MAD 4-byte opcode
Add emission rules for negative and saturate flags for MAD 4-byte opcodes,
and get rid of some of the constraints. Obviously tested with a wide variety
of shaders.
V2: Document MAD as supported short form
V3: Split up IMM from short-form modifiers
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++------
2014 May 30
4
[Bug 79462] New: [NVC0/Codegen] Shader compilation falis in spill logic
https://bugs.freedesktop.org/show_bug.cgi?id=79462
Priority: medium
Bug ID: 79462
Assignee: nouveau at lists.freedesktop.org
Summary: [NVC0/Codegen] Shader compilation falis in spill logic
Severity: normal
Classification: Unclassified
OS: All
Reporter: imirkin at alum.mit.edu
Hardware: Other
2014 Jun 03
6
[PATCH v3 0/4] Constant folding of new Instructions
Yet another try for constant folding of Instructions for nvc0.
Please Review this again! (Hopefully the last time ;-) )
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant
2014 Sep 01
0
[PATCH] nv50/ir: use unordered_set instead of list to keep track of var defs
...+1576,13 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
assert(defi);
if (defi->isPseudo()) {
d = lval->defs.erase(d);
- --d;
if (slot->reg.file == FILE_MEMORY_LOCAL)
delete_Instruction(func->getProgram(), defi);
else
defi->setDef(0, slot);
} else {
spill(defi, slot, dval);
+ d++;
}
}
@@ -2098,7 +2097,7 @@ RegAlloc::InsertConstraintsPass::insertConstraintMoves()
}
assert(cst->getSrc(s)...
2014 Jan 13
20
[PATCH 00/19] nv50: add sampler2DMS/GP support to get OpenGL 3.2
OK, so there's a bunch of stuff in here. The geometry stuff is based on the
work started by Bryan Cain and Christoph Bumiller.
Patches 01-12: Add support for geometry shaders and fix related issues
Patches 13-14: Make it possible for fb clears to operate on texture attachments
with an explicit layer set (as is allowed in gl 3.2).
Patches 15-17: Make ARB_texture_multisample work