search for: getpointerty

Displaying 20 results from an estimated 68 matches for "getpointerty".

2013 Jul 25
2
[LLVMdev] Status of getPointerSize()/getPointerTy() per address space?
Awesome! What will the requirements be for the target? Is it sufficient to just override getPointerTy and add appropriate data layout strings, or will more hooks be needed? On Thu, Jul 25, 2013 at 3:41 PM, Matt Arsenault <arsenm2 at gmail.com> wrote: > > On Jul 25, 2013, at 12:33 , Justin Holewinski <justin.holewinski at gmail.com> > wrote: > > > Looking through rec...
2013 Jul 25
2
[LLVMdev] Status of getPointerSize()/getPointerTy() per address space?
Looking through recent additions, it looks like the infrastructure exists for targets to specify a per-address-space pointer size/type, but this does not seem to be used anywhere (SelectionDAGBuilder, legalizer, etc.). What is the status of this support? Is anyone actively working on it? -- Thanks, Justin Holewinski -------------- next part -------------- An HTML attachment was scrubbed...
2013 Jul 25
0
[LLVMdev] Status of getPointerSize()/getPointerTy() per address space?
On Jul 25, 2013, at 12:33 , Justin Holewinski <justin.holewinski at gmail.com> wrote: > Looking through recent additions, it looks like the infrastructure exists for targets to specify a per-address-space pointer size/type, but this does not seem to be used anywhere (SelectionDAGBuilder, legalizer, etc.). What is the status of this support? Is anyone actively working on it? >
2012 Aug 17
2
[LLVMdev] RFC: Supporting different sized address space arithmetic
...er type is 32/64bits, but there are small distinct memories that only have 16 bits of addressing(think GPU's with small software controlled memory segments). I am proposing a modification to a few API's in SelectionDAG that I believe will fix this problem. In TargetLowering * Add getPointerTy to take an argument, the address space, this defaults to 0. * Add a virtual API call that returns the default address space for the target, this defaults to returning 0. * Have the original getPointerTy implementation with no arguments query for the default address space. In Selec...
2008 Sep 15
0
[LLVMdev] Alignment of constant loads
...from the node, instead of making its own > decision: > cast<ConstantPoolSDNode>(CPIdx)->getAlignment() > > I followed your suggestion but I've come across a bit of a snag. If you get the alignment in LegalizeDAG using: SDValue CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy()); unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment(); The ConstantPoolSDNode is created using MVT i32 (TLI.getPointerTy()) and the alignment is 4 bytes. It seems there is not enough information to know that the final MVT will be v4f32 so passing the alignment to get...
2008 Sep 13
2
[LLVMdev] Alignment of constant loads
On Fri, September 12, 2008 11:33 am, Stefanus Du Toit wrote: > Hi, > > We've noticed that constant loads, e.g. of v4f32 types, are not > aligned to the preferred alignment but rather to the ABI alignment, at > least on x86. On x86 targets it's usually 16 for both preferred and ABI. I guess you're using a target with a lower ABI alignment for vectors? > This seems to
2012 Aug 27
2
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...his patch that don't follow > the naming convention (which specifies that they should start with an > uppercase letter). > > > if (PtrBits < 64) > > - OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), > > - TLI.getPointerTy(), > > + OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), > > PtrTy, DAG.getConstant(Offs, MVT::i64)); > > This is not necessarily specific to your patch, but can you explain the > special role of 64-bits here? > > Thanks again, > Hal > > On Fri...
2010 Feb 11
3
[LLVMdev] Adding NonTemporal
...SelectionDAG::getLoad/getStore and friends non-default. I've already caught one bug in the XCore backend by doing this: if (Offset % 4 == 0) { // We've managed to infer better alignment information than the load // already has. Use an aligned load. return DAG.getLoad(getPointerTy(), dl, Chain, BasePtr, NULL, 4, false, false, 0); } Whoops! There's no alignment info being set here! Is there any reason to keep these as default arguments? It invites silent coding errors. I did this because I have to propagate the non-temporal information t...
2012 Aug 24
5
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...m proposing a modification to a few API's in SelectionDAG that > > >> > I believe will fix this problem. > > >> > > > >> > > > >> > > > >> > In TargetLowering > > >> > > > >> > * Add getPointerTy to take an argument, the address > space, > > >> this > > >> > defaults to 0. > > >> > > > >> > * Add a virtual API call that returns the default address > > >> space for > > >> > the target, this default...
2012 Aug 17
0
[LLVMdev] RFC: Supporting different sized address space arithmetic
...es that only have 16 bits of > addressing(think GPU's with small software controlled memory segments). > > > > I am proposing a modification to a few API's in SelectionDAG that I believe > will fix this problem. > > > > In TargetLowering > > · Add getPointerTy to take an argument, the address space, this > defaults to 0. > > · Add a virtual API call that returns the default address space for > the target, this defaults to returning 0. Under what circumstances would the default address space for a target not be 0? > · Have...
2012 Aug 24
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...number of variable names in this patch that don't follow the naming convention (which specifies that they should start with an uppercase letter). > if (PtrBits < 64) > - OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), > - TLI.getPointerTy(), > + OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), > PtrTy, DAG.getConstant(Offs, MVT::i64)); This is not necessarily specific to your patch, but can you explain the special role of 64-bits here? Thanks again, Hal On Fri, 24 Aug 2012 23:07:54 +0000 "Villmow, Micah&...
2012 Aug 27
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...w > > the naming convention (which specifies that they should start with > > an uppercase letter). > > > > > if (PtrBits < 64) > > > - OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), > > > - TLI.getPointerTy(), > > > + OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), > > > PtrTy, DAG.getConstant(Offs, MVT::i64)); > > > > This is not necessarily specific to your patch, but can you explain > > the special role of 64-bits here? > > > > Thank...
2012 Aug 17
2
[LLVMdev] RFC: Supporting different sized address space arithmetic
...with small software controlled memory > segments). > > > > > > > > I am proposing a modification to a few API's in SelectionDAG that I > > believe will fix this problem. > > > > > > > > In TargetLowering > > > > * Add getPointerTy to take an argument, the address space, > this > > defaults to 0. > > > > * Add a virtual API call that returns the default address > space for > > the target, this defaults to returning 0. > > Under what circumstances would the default address space for...
2010 Feb 12
0
[LLVMdev] Adding NonTemporal
...d friends non-default. > > I've already caught one bug in the XCore backend by doing this: > > if (Offset % 4 == 0) { > // We've managed to infer better alignment information than the load > // already has. Use an aligned load. > return DAG.getLoad(getPointerTy(), dl, Chain, BasePtr, NULL, 4, > false, false, 0); > } > > Whoops! There's no alignment info being set here! > > Is there any reason to keep these as default arguments? It invites silent > coding errors. I did this because I have to propagat...
2007 Oct 05
0
[LLVMdev] RFC: Tail call optimization X86
...struct pointer, so we have to push it back. // This is common for Darwin/X86, Linux & Mingw32 targets. NumBytesForCalleeToPush = isSRet ? 4 : 0; } NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); Ops.clear(); Ops.push_back(Chain); Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); Ops.push_back(DAG.getConstant(NumBytesForCalleeToPush, getPointerTy ())); Ops.push_back(InFlag); Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); InFlag = Chain.getValue(1); The third operand is the number of bytes the callee pops of the stack on retu...
2012 Oct 26
1
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP.
...ector. if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else { // Sanity check. assert(VA.isMemLoc()); // Get the stack pointer if needed. if (StackPtr.getNode() == 0) { StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, getPointerTy()); } SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, DAG.getIntPtrConstant(VA.getLocMemOffset())); MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo(),false, false, 0)); } ... [2]: LowerFormalArguments ......
2007 Sep 24
2
[LLVMdev] RFC: Tail call optimization X86
...llingConv, bool isTailCall, bool isNextInstRet, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { SmallVector<SDOperand, 32> Ops; Ops.push_back(Chain); // Op#0 - Chain Ops.push_back(DAG.getConstant(CallingConv, getPointerTy())); // Op#1 - CC Ops.push_back(DAG.getConstant(isVarArg, getPointerTy())); // Op#2 - VarArg if (isTailCall && IsEligibleForTailCallElimination(DAG, isNextInstRet, Callee, CallingConv)) Ops.push_back(DAG.getConstant(true, getPointerTy())); // Op#3 - Tail The in...
2012 Sep 21
0
[LLVMdev] Seperate stack location for outgoing parameters and local variables for custom target?
...Lowering.cpp, there's this code (From the MIPS target): * // Create the frame index object for this incoming parameter LastFI = MFI->CreateFixedObject(ValVT.getSizeInBits()/8, VA.getLocMemOffset(), true); SDValue PtrOff = DAG.getFrameIndex(LastFI, getPointerTy());* This looks like what I might want to change, but I'm not sure what's the right thing to do. Here's what I tried to change it to: * LastFI = MFI->CreateStackObject(ValVT.getSizeInBits()/8, VA.getLocMemOffset(), false); SDValue PtrOff = DAG...
2008 Jan 08
1
[LLVMdev] RFC: Tailcall Improvement
Here is a patch to improve argument lowering for tail calls. Before this patch all outgoing arguments were move to the stack slot where they would go on a normal function call and from there moved back to the tail call stack slot to prevent overwriting of values. After this patch only arguments that source from callers arguments (formal_arguments) are lowered this way. I moved some code
2012 Aug 25
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...g::getValueType() doesn't work for arbitrary address spaces, you should fix it. I think my earlier comments about getIntPtrConstant still hold: instead of "DAG.getIntPtrConstant(Offset, addrSpace)", you can just write "DAG.getConstant(Offset, PtrTy)". + EVT NewPtrVT = TLI.getPointerTy(dyn_cast<PointerType>( + SV->getType())->getAddressSpace()); + if (PtrVT != NewPtrVT) { + // Check to see if we want to change the size of the pointer + // based on the address space and if so extend or truncate the pointer. + Ptr = DAG.getSExtOrTrunc(Ptr, getCurDebugLo...