search for: getpointerregclass

...rs in VC++ Express (not sure about other MSVC versions). Adding #ifdef _MSC_VER #include <iostream> #endif to Streams.h seems to remedy this, but presumably causes the same problems the new Stream model was intended to fix. In Target\TargetInstrInfo.h virtual const TargetRegisterClass *getPointerRegClass() const { assert(0 && "Target didn't implement getPointerRegClass!"); abort(); } causes an error (non void funcs must return a value). Add return(NULL) to fix. Other than that, the MSVC projects reference a few old (deleted) files, but no more code changes are nece...

...way, but it's not clear to me what I'm missing that would enable this to begin working. /// PointerLikeRegClass - ... TableGen treats the register class as having a symbolic /// type that it doesn't know, and resolves the actual regclass to use by using /// the TargetRegisterInfo::getPointerRegClass() hook at codegen time. I do see ptr_rc and ptr_rc_nosp references in X86/X86InstrInfo.td ; but I can't tell how or why it works differently there than in PowerPC/PPCInstr64Bit.td Thoughts/comments/suggestions? Thanks, -Will

...ear to me what I'm missing that > would enable this to begin working. > > /// PointerLikeRegClass - ... TableGen treats the register class as having a symbolic > /// type that it doesn't know, and resolves the actual regclass to use by using > /// the TargetRegisterInfo::getPointerRegClass() hook at codegen time. > > I do see ptr_rc and ptr_rc_nosp references in X86/X86InstrInfo.td ; but I can't > tell how or why it works differently there than in PowerPC/PPCInstr64Bit.td > > > Thoughts/comments/suggestions? I've been poking at this a bit more, and have...

Hi, I am seeing a case, in a private port, of an inline asm with indirect memory references being allocated invalid registers (i.e. registers that cannot be used on loads). For example, the inline asm constraint is correct: call void asm sideeffect "MOV $$r0, $0\0AMOV $$r0, $1\0A", "*m,*m,~{r0}"(i16* @a, i16* %b) #1, !srcloc !1 but then $0 and $1 are allocated to registers

...with Intrinsics.gen so the first time you build it has not been generated before the first time it's included. I suspect this is the same with VS2003 if you make a completely clean checkout from CVS and try to build. Second, the VS2005 compiler gives an error when compiling TargetInstrInfo.h:getPointerRegClass() (line 386) because the function doesn't return a value (it abort()s so it's not really a problem), just add this line at the end of the function: return NULL; // Must return a value in order to compile with VS 2005 There's a ton of warnings, a few of which seem to be 'real...

...ssing that > > would enable this to begin working. > > > > /// PointerLikeRegClass - ... TableGen treats the register class as having a symbolic > > /// type that it doesn't know, and resolves the actual regclass to use by using > > /// the TargetRegisterInfo::getPointerRegClass() hook at codegen time. > > > > I do see ptr_rc and ptr_rc_nosp references in X86/X86InstrInfo.td ; but I can't > > tell how or why it works differently there than in PowerPC/PPCInstr64Bit.td > > > > > > Thoughts/comments/suggestions? > > I've b...

...ply i32's. If I lower the calling convention stuff manually rather than relying on the generated CC analyzer, how do I determine that a formal argument I'm about to receive or pack together is supposed to be used as a pointer so I can stick it in an address register? 2) How do I implement getPointerRegClass() in my TargetInstrInfo subtype? Returning the proper thing (the address register class) makes the instruction scheduler very unhappy and it asserts complaining that the register classes don't agree (which they don't, obviously, because everything has been selected as data register instruct...

On Sep 24, 2007, at 1:12 AM, Andreas Fredriksson wrote: > On 9/24/07, Evan Cheng <evan.cheng at apple.com> wrote: > >> I am going to suggest something shocking. :) Since you will end up >> writing a >> bunch of target specific code anyway, you might a well write a target >> specific pass that change generic instructions into data register >> variant

Morten Ofstad wrote: > Jeff Cohen wrote: > >> The recent issues concern the head revision, post 1.9. As no one has >> ever submitted patches to fix 2005 problems with the 1.9 release, it is >> safe to say they still exist. >> > > For the 1.5 release I submitted patches that made everything compile correctly with VS2005, I think there are some mails

Jeff Cohen wrote: > The recent issues concern the head revision, post 1.9. As no one has > ever submitted patches to fix 2005 problems with the 1.9 release, it is > safe to say they still exist. For the 1.5 release I submitted patches that made everything compile correctly with VS2005, I think there are some mails in the archives about the issues I ran into. I also submitted patches

(The previous sent message had some issues...) ---------------------------------------------- Hello to everybody, I just want make a quick summary: OBJECTIVE: discuss for finding a way to represent logical (derived from source language abstractions) address space also in the IR to be able to exploit this information for optimizations. CURRENT STATE: The partial workaround probably used IMO

...used > as a pointer so I can stick it in an address register? I'd suggest custom lowering for now. Again use data registers during lowering and fix them during the isel post pass if the parameters are used as pointers. Do you think that would work? > > > 2) How do I implement getPointerRegClass() in my TargetInstrInfo > subtype? Returning the proper thing (the address register class) makes > the instruction scheduler very unhappy and it asserts complaining that > the register classes don't agree (which they don't, obviously, because > everything has been selected as da...

...sized address regs * most address regs are larger than int regs * address regs only support a sub-set of operations * some address spaces are disjoint, some may overlap. so far, I declared a data layout with "-p0:xx:yy-pp1:zz:aa-p2:... " etc. ... implemented getPointerWidthV() (and getPointerRegClass(), which never seems to get called). I see that global data items are correctly sized according to my pointer definitions - but that all operations are carried out as if pointers were sized for address space 0. What is required to (at minimum) get the different size pointers working? Whilst the...

Hello to everybody, I would like to start a discussion about a possible extension of address space concept in LLVM. The idea was born starting from this discussion in the clang mailing list (first msg: http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20130715/084011.html - interesting point: http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20130722/084499.html) where