Displaying 20 results from an estimated 23 matches for "getop".
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getopt
2017 Apr 29
5
[PATCH v2] nv50/ir: optimize shl(a, 0) to a
.../codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -1284,6 +1284,13 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
case OP_SHL:
{
+ if (s == 1 && imm0.isInteger(0)) {
+ i->op = i->src(0).mod.getOp();
+ if (i->op != OP_CVT)
+ i->src(0).mod = 0;
+ i->setSrc(1, NULL);
+ break;
+ }
if (s != 1 || i->src(0).mod != Modifier(0))
break;
// try to concatenate shifts
--
2.12.2
2017 Apr 30
0
[PATCH v2] nv50/ir: optimize shl(a, 0) to a
...com> wrote:
2017-04-30 2:28 GMT+02:00 Ilia Mirkin <imirkin at alum.mit.edu>:
> Maybe in a separate change. I'd want to double check on all gens. I think
> the thing I suggested is sufficient.
>
well, if I just fixup the op, I kind of have to fix the mod as well.
And if I use getOp, it could also return a OP_CVT, so I have to do the
check.
I don't see how I can only use getOp, but not fixing the mod?
Perhaps this all doesn't work the way I remember. Will try to look during
the week.
> On Apr 29, 2017 8:09 PM, "Karol Herbst" <karolherbst at gmail.c...
2016 Oct 02
2
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...m0, int s)
break;
case OP_MAD:
if (imm0.isInteger(0)) {
+ ImmediateValue imm1;
i->setSrc(0, i->getSrc(2));
i->src(0).mod = i->src(2).mod;
i->setSrc(1, NULL);
i->setSrc(2, NULL);
- i->op = i->src(0).mod.getOp();
- if (i->op != OP_CVT)
- i->src(0).mod = 0;
+ if (i->src(0).getImmediate(imm1)) {
+ bld.setPosition(i, false);
+ newi = bld.mkMov(i->getDef(0), bld.mkImm(imm1.reg.data.u64),
+ i->dType);
+ dele...
2016 Oct 02
2
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...isInteger(0)) {
>> + ImmediateValue imm1;
>> i->setSrc(0, i->getSrc(2));
>> i->src(0).mod = i->src(2).mod;
>> i->setSrc(1, NULL);
>> i->setSrc(2, NULL);
>> - i->op = i->src(0).mod.getOp();
>> - if (i->op != OP_CVT)
>> - i->src(0).mod = 0;
>> + if (i->src(0).getImmediate(imm1)) {
>> + bld.setPosition(i, false);
>> + newi = bld.mkMov(i->getDef(0), bld.mkImm(imm1.reg.data.u64),
>> +...
2020 Oct 09
2
Manipulating DAGs in TableGen
...g today whether the TableGen DAG support would be more useful if you could manipulate DAGs a little more easily. Right now, you can:
* Specify a DAG with (...)
* Catenate DAGs with !con().
* Construct a DAG with !dag().
* Iterate over a DAG with !foreach().
* Get and set the DAG operator with !getop() and !setop().
What if you could also get and set a DAG's operands individually, by position or by $xxx name? Would that add enough power/convenience that you would build more interesting DAGs in TableGen, or is it just easier to do such building in the backends?
2016 Oct 02
0
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...P_MAD:
> if (imm0.isInteger(0)) {
> + ImmediateValue imm1;
> i->setSrc(0, i->getSrc(2));
> i->src(0).mod = i->src(2).mod;
> i->setSrc(1, NULL);
> i->setSrc(2, NULL);
> - i->op = i->src(0).mod.getOp();
> - if (i->op != OP_CVT)
> - i->src(0).mod = 0;
> + if (i->src(0).getImmediate(imm1)) {
> + bld.setPosition(i, false);
> + newi = bld.mkMov(i->getDef(0), bld.mkImm(imm1.reg.data.u64),
> + i...
2017 Apr 30
0
[PATCH v2] nv50/ir: optimize shl(a, 0) to a
...ers/nouveau/codegen/nv50_ir_peephole.cpp
>> @@ -1284,6 +1284,13 @@ ConstantFolding::opnd(Instruction *i,
ImmediateValue &imm0, int s)
>>
>> case OP_SHL:
>> {
>> + if (s == 1 && imm0.isInteger(0)) {
>> + i->op = i->src(0).mod.getOp();
>> + if (i->op != OP_CVT)
>> + i->src(0).mod = 0;
>
> Is this necessary? Presumably if the op != 0, then op == OP_CVT...
>
yeah, no idea. I just thought I do it right when I actually depend on
the getOp magic. But we can't emit any mods to begin...
2016 Oct 02
0
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...> + ImmediateValue imm1;
>>> i->setSrc(0, i->getSrc(2));
>>> i->src(0).mod = i->src(2).mod;
>>> i->setSrc(1, NULL);
>>> i->setSrc(2, NULL);
>>> - i->op = i->src(0).mod.getOp();
>>> - if (i->op != OP_CVT)
>>> - i->src(0).mod = 0;
>>> + if (i->src(0).getImmediate(imm1)) {
>>> + bld.setPosition(i, false);
>>> + newi = bld.mkMov(i->getDef(0), bld.mkImm(imm1.reg.data.u6...
2016 Oct 02
1
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
...Value imm1;
>>>> i->setSrc(0, i->getSrc(2));
>>>> i->src(0).mod = i->src(2).mod;
>>>> i->setSrc(1, NULL);
>>>> i->setSrc(2, NULL);
>>>> - i->op = i->src(0).mod.getOp();
>>>> - if (i->op != OP_CVT)
>>>> - i->src(0).mod = 0;
>>>> + if (i->src(0).getImmediate(imm1)) {
>>>> + bld.setPosition(i, false);
>>>> + newi = bld.mkMov(i->getDef(0), bld.mk...
2017 Apr 29
3
[PATCH] nv50/ir: optimmize shl(a, 0) to a
helps two alien isolation shaders
shader-db:
total instructions in shared programs : 4251497 -> 4251494 (-0.00%)
total gprs used in shared programs : 513962 -> 513962 (0.00%)
total local used in shared programs : 29797 -> 29797 (0.00%)
total bytes used in shared programs : 38960264 -> 38960232 (-0.00%)
local gpr inst bytes
helped
2007 Aug 08
0
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
...TOT means trunk of today (funny because in german, my native language
it means death)?
So what i will be trying then is to emit a copytoreg from the virtual
register holding the
function pointer to ecx before the tailcall node.
So where i approximately had this before (assuming that RetNode.getOp
(1) is not a TargetGlobalAddress or the like)
SDOperand OpsTailCall [] = {AdjStackChain, RetNode.getOperand(1),
RetNode.getOperand(2)};
RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall,3);
would then be replaced by
Chain = DAG.getCopyToReg(AdjStackChain, X86::ECX, RetNode.getOpe...
2017 Apr 03
5
[PATCH v2 0/3] nv50/ir: Preapre for running Opts inside a loop
Slowly we are getting to the point, that we miss enough optimization
opportunities as the result of our own passes.
For this we need to fix AlgebraicOpt to be able to handle mods on sources
without creating new issues.
The last patch enables looping opts.
v2: update commit author
Karol Herbst (3):
nv50/ir: fix AlgebraicOpt for slcts with mods
nv50/ir: handle logops with NOT in AlgebraicOpt
2007 Aug 08
4
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
Hello, Arnold.
> Is there a way to indicate that the register the tail call
> instruction uses as destination needs to be valid after the callee
> saved registers have been restored? (some X86InstrInfo.td foo magic
> maybe ?)
It's wrong way to do the things. Because in this case you either violate
the ABI for callee, or you're restricted to do tail call lowering only
for
2020 Oct 11
2
Manipulating DAGs in TableGen
...dag(dag, index1, value1, index2, value2, ...)
This bang operator creates a copy of the top-level dag node and
then replaces the operator and/or operands with new values. Each
replacement is specified by an index and a value. The new dag
is produced.
The two new bang operators replace !getop() and !setop(), which could be
deprecated.
4. The !size operator will be extended to accept a DAG and produce
the number of operands in it.
2017 Apr 03
0
[PATCH v2 1/3] nv50/ir: fix AlgebraicOpt for slcts with mods
....0f))
slct->setSrc(0, slct->getSrc(1));
} else
- if (slct->getSrc(0) != slct->getSrc(1)) {
+ if (slct->getSrc(0) != slct->getSrc(1) || slct->src(0).mod != slct->src(1).mod)
return;
- }
- slct->op = OP_MOV;
+ slct->op = slct->src(0).mod.getOp();
+ slct->src(0).mod = slct->src(0).mod ^ Modifier(slct->op);
slct->setSrc(1, NULL);
slct->setSrc(2, NULL);
}
--
2.12.2
2017 Apr 29
0
[PATCH] nv50/ir: optimmize shl(a, 0) to a
...;src(0).mod != Modifier(0))
> break;
Interesting. This suggests that src(0) may have modifiers, although I
can't imagine what that'd be. Perhaps it can take a neg? In that case,
you need to fix the OP_MOV above -- should probably do it anyways,
i.e. i->op = i->src(0).mod.getOp() or something. With that, this is
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Separately, I just noticed that we don't appear to have any 0 << x or
0 >> y or EXTBF or anything like that. I doubt it comes up too often
though.
> // try to concatenate shifts...
2017 Apr 29
0
[PATCH v2] nv50/ir: optimize shl(a, 0) to a
...; +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> @@ -1284,6 +1284,13 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
>
> case OP_SHL:
> {
> + if (s == 1 && imm0.isInteger(0)) {
> + i->op = i->src(0).mod.getOp();
> + if (i->op != OP_CVT)
> + i->src(0).mod = 0;
Is this necessary? Presumably if the op != 0, then op == OP_CVT...
> + i->setSrc(1, NULL);
> + break;
> + }
> if (s != 1 || i->src(0).mod != Modifier(0))
>...
2015 Mar 25
0
[PATCH] nv50/ir: take postFactor into account when doing peephole optimizations
...} else
- if (imm0.isInteger(1) || imm0.isInteger(-1)) {
+ if (!i->postFactor && (imm0.isInteger(1) || imm0.isInteger(-1))) {
if (imm0.isNegative())
i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
i->op = i->src(t).mod.getOp();
@@ -797,7 +801,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
i->src(0).mod = 0;
i->setSrc(1, NULL);
} else
- if (imm0.isInteger(2) || imm0.isInteger(-2)) {
+ if (!i->postFactor && (imm0.isInteger(2) || imm0.is...
2017 Apr 03
3
[PATCH 0/3] nv50/ir: Preapre for running Opts inside a loop
Slowly we are getting to the point, that we miss enough optimization
opportunities as the result of our own passes.
For this we need to fix AlgebraicOpt to be able to handle mods on sources
without creating new issues.
The last patch enables looping opts.
Karol Herbst (3):
nv50/ir: fix AlgebraicOpt for slcts with mods
nv50/ir: handle logops with NOT in AlgebraicOpt
nv50/ir: run some
2013 May 10
8
[Bug 1448] Report wrong command-line options
...|Removed |Added
----------------------------------------------------------------------------
CC| |dtucker at zip.com.au
--- Comment #4 from Darren Tucker <dtucker at zip.com.au> ---
whatever it is, it doesn't seem to be gnu-getopt specific. or if it
is, it's not enabled with the default set of defines.
#include <stdio.h>
#include <unistd.h>
int main(int argc, char **argv)
{
int ch;
while ((ch = getopt(argc, argv, "abc:")) != -1) {
printf("opt %c optarg %s\n", ch, optarg...