search for: getnextoperandforreg

...s not preserve TargetFlag > > > On Aug 6, 2012, at 11:00 AM, Vincent Lejeune <vljn at ovi.com> wrote: > >> Ok. >> >> I tried to do it using a pass after register allocation, lowering NEG/ABS > instructions. >> However I met a problem : apparently getNextOperandForReg() can returns a > MachineOperand before the one I'm processing. >> >> The following code snippet : >> >> >> void R600ModifiersPropagation::substituteReg(MachineOperand &def_MO, > unsigned new_reg, unsigned char flag) { >>   MachineOperand *...

On Aug 6, 2012, at 11:00 AM, Vincent Lejeune <vljn at ovi.com> wrote: > Ok. > > I tried to do it using a pass after register allocation, lowering NEG/ABS instructions. > However I met a problem : apparently getNextOperandForReg() can returns a MachineOperand before the one I'm processing. > > The following code snippet : > > > void R600ModifiersPropagation::substituteReg(MachineOperand &def_MO, unsigned new_reg, unsigned char flag) { > MachineOperand * MO = def_MO.getNextOperandForReg(); &g...

...ork this : I'd like that a "DST = FNEG SRC" custom Emitter lowering pass replaces every occurence of DST by SRC and set the corresponding TargetFlag in the process. Something like this : MachineOperand *MO = &(MI->getOperand(0)); while(MO) {   MachineOperand *next_MO = MO->getNextOperandForReg();   MO->addTargetFlag(MO_FLAG_NEG);   MO->setReg(MI->getOperand(1).getReg());   MO = next_MO; } As far as I can tell, this works as every register are still virtual when lowering custom Emitter instructions. However the RegisterCoalescer pass does not preserve TargetFlag in the JoinCopy(...

On Aug 6, 2012, at 11:16 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > > The getNextOperandForReg() function isn't used anywhere, Should we remove it? -Jim

I am looking for the slot index of a register around the given slot index Min. Is there a better way than the linear search: ... findDefUsesAroundIndex( LiveInterval* li, SlotIndex Min ) ... for( MachineOperand * mo = MRI->getRegUseDefListHead(li->reg); mo; mo = mo->getNextOperandForReg() ) { SlotIndex si = SI->getInstructionIndex( use.getOperand().getParent() ); if( Min.distance(si) >= 0 ) ... - Thanks Jeff Kunkel On Thu, Jan 20, 2011 at 8:37 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > I have a live interval, and I would like to find out what Slot...

...that implement instructions as a flag modifier in instruction ? No, I am not aware that any of the targets in the tree do something like that. TargetFlags is used by ARM to modify global symbol operands and such. But I meant you should be looking at the coding style used in the other targets. The getNextOperandForReg() function isn't used anywhere, see the MachineRegisterInfo iterators instead. /jakob

...; ope; ++opi ) { MachineOperand & operand = mbbi->getOperand(opi); if( operand.isReg() == false ) continue; if( operand.getReg() == 0 ) continue; if( ! TargetRegisterInfo::isVirtualRegister(operand.getReg()) ) continue; if( mbb != operand.getNextOperandForReg()->getParent()->getParent() ) liveout.push_back( operand.getReg() ); } } return liveout; } On Fri, Nov 5, 2010 at 7:41 AM, s Last namerc <srcsrc84 at yahoo.com> wrote: > Is there an easy way to obtain all liveout variables of a basic block? > Liveins > can be...

I have a live interval, and I would like to find out what SlotIndex the next use the register will occur? Is there any way to map a live interval back into instructions or SlotIndexes or blocks used by? - Thanks Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110120/fd429dbd/attachment.html>

Is there an easy way to obtain all liveout variables of a basic block? Liveins can be found for each MachineBasicBlock, but I can only find liveouts for the whole function, at MachineRegisterInfo. Do I need to find them out manually?

...g:../src/getbits.c:60:1 704B RET pred:%noreg, %RT<imp-use>, %P15<imp-use,kill>; dbg:../src/getbits.c:60:1 # End machine code for function CGA_kernel_read. llc: /work/llvm/trunk/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:76: static llvm::MachineOperand* llvm::MachineRegisterInfo::getNextOperandForReg(const llvm::MachineOperand*): Assertion `MO && MO->isReg() && "This is not a register operand!"' failed. Program received signal SIGABRT, Aborted. 0xb7fdd424 in __kernel_vsyscall () (gdb) bt #0 0xb7fdd424 in __kernel_vsyscall () #1 0xb7cfe1ef in __GI_raise (sig=6...

...rand we don't care about, skip it. - while (Op && ((!ReturnDefs && Op->isDef()) || + while (Op && ((!ReturnDefs && Op->isDef() && !Op->readsReg()) || (SkipDebug && Op->isDebug()))) Op = getNextOperandForReg(Op); } } public: But of course then other tests fail. For example: build-all/./bin/llc < test/CodeGen/R600/literals.ll -march=r600 -mcpu=redwood gives llc: ../lib/CodeGen/TwoAddressInstructionPass.cpp:684: void (anonymous namespace)::TwoAddressInstructionPass::scanUses...

Hi Quentin, On 08/15/14 19:01, Quentin Colombet wrote: [...] >> The question is: How should true subregister definitions be >> expressed so that they do not interfere with each other? See the >> detailed problem description below. > > We do have a limitation in our current liveness tracking for > sub-register. Therefore, I am not sure that is possible. > >