search for: getlocation

Displaying 20 results from an estimated 59 matches for "getlocation".

2010 Jun 21
2
[LLVMdev] MC: Object file specific parsing
Hi Daniel, attached is a patch that pushes most of the object file specific parsing out of AsmParser and down into MachOAsmParser. This was done as a cleanup for the ELF work. I know that you're not happy with this approach, particularly the fact that as we add more object file formats and assembler dialects, it's going to cause a class explosion. But I was hoping that we could use this
2015 Feb 16
2
[LLVMdev] alias result
Oh, got it. Thanks for your explain. I misunderstand what getLocation does. If I would like to get the result of alias analysis referring to the stored value, what should I do in llvm? On 2/16/15 1:42 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: "Hal Finkel" <...
2015 Feb 16
2
[LLVMdev] alias result
...bject: [LLVMdev] alias result >>>> >>>> Hi all, >>>> >>>> I am implementing a pass which needs aliasanalysis in llvm. >>>> >>>> My pass firstly records all store or load instructions as follows: >>>> loc[cnt++] = AA.getLocation(si/li); >>>> >>>> Then, get each pairwise alias result. >>>> AliasAnalysis::AliasResult ar = AA.alias(loc[i], loc[j]); >>>> switch(ar){ case 0,1,2,3;} >>>> >>>> And the command is: opt -load mypass.so -mypass -basicaa test.bc &...
2018 Sep 28
3
error: expected memory with 32-bit signed offset
Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 
2015 Mar 31
4
[LLVMdev] where should volatileness really live in the AA API?
...are volatile loads in the way. I.E. define i32 @test1(i32* nocapture %p, i32* nocapture %q) { entry: %x = load i32, i32* %p %0 = load volatile i32, i32* %q %y = load i32, i32* %p %add = sub i32 %y, %x ret i32 %add } Currently, getModRefInfo will return Mod for getModRefInfo(%0, AA->getLocation(%y)) This is because it punts on saying anything about ordered loads I can certainly watch for this case in the caller, and ignore it if it's volatile load vs non-volatile load. This is what MemDep does. class Location is theoretically about pointers and sizes, but right now, our struct Loca...
2017 Jun 07
1
Operating on RC in a list
...plyr should be able to work with lists too. Right ? Subject <- setRefClass("Subject", fields = list( id = "numeric", measurement = "Measurement", location = "Location"), methods=list(getmeasurement = function() { measurement }, getid = function() { id }, getlocation = function() { location }, summary = function()#Implement other summary methods in appropriate objects as per their responsibilities { paste("Subject summary ID [",id,"] Location [",location$summary(),"]") },show = function(){ cat("Subject summary ID [",id,&q...
2013 Dec 12
3
[LLVMdev] [RFC PATCH 1/2] x86: Fix ModR/M byte output in 16-bit addressing mode
This attempts to address http://llvm.org/bugs/show_bug.cgi?id=18220 It also fixes a test which was requiring the *wrong* output. I'm relatively happy with this part, and it even solves most of the hard part of feature request for .code16 in bug 8684 — which was actually why I started prodding at this. But I could do with some help with the 16-bit signed relocation handling, which I've
2020 Sep 27
3
How to add a new clang-tidy module
...r::MatchResult &Result) { + // FIXME: Add callback implementation. + const auto *MatchedDecl = Result.Nodes.getNodeAs<FunctionDecl>("x"); + if (!MatchedDecl->getIdentifier() || MatchedDecl->getName().startswith("awesome_")) + return; + diag(MatchedDecl->getLocation(), "function %0 is insufficiently awesome") + << MatchedDecl; + diag(MatchedDecl->getLocation(), "insert 'awesome'", DiagnosticIDs::Note) + << FixItHint::CreateInsertion(MatchedDecl->getLocation(), "awesome_"); +} + +} // namespace...
2015 Feb 16
2
[LLVMdev] alias result
Hi all, I am implementing a pass which needs aliasanalysis in llvm. My pass firstly records all store or load instructions as follows: loc[cnt++] = AA.getLocation(si/li); Then, get each pairwise alias result. AliasAnalysis::AliasResult ar = AA.alias(loc[i], loc[j]); switch(ar){ case 0,1,2,3;} And the command is: opt -load mypass.so -mypass -basicaa test.bc The store/load in test.bc: (1): store i64* %thd, i64** %t, align 8 //int64 *t = &thd; (2): %...
2017 Dec 15
2
InstAlias with tied operands - can it be supported?
Hello, InstAlias does not allow tied operands (repeated operands) in the asm string to be matched. It seems this situation is explicitly prevented in AsmMatcherEmitter.cpp: if (!Hack) PrintFatalError(TheDef->getLoc(), "ERROR: matchable with tied operand '" + Tok + "' can never be matched!");
2015 Feb 16
2
[LLVMdev] alias result
...Sent: Monday, February 16, 2015 12:12:18 PM >> Subject: [LLVMdev] alias result >> >> Hi all, >> >> I am implementing a pass which needs aliasanalysis in llvm. >> >> My pass firstly records all store or load instructions as follows: >> loc[cnt++] = AA.getLocation(si/li); >> >> Then, get each pairwise alias result. >> AliasAnalysis::AliasResult ar = AA.alias(loc[i], loc[j]); >> switch(ar){ case 0,1,2,3;} >> >> And the command is: opt -load mypass.so -mypass -basicaa test.bc >> >> The store/load in test.bc: >...
2017 Sep 04
2
Issues in Vector Add Instruction Machine Code Emission
Hello, I am trying to emit binary for my implemented vector instructions. Although yet i havent done any change or addition in MC framework, For vector load instruction there are no error coming. But for vector add instruction is something like this; > %R_0_REG2048b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>, %R_0_REG2048b_0<kill> I am getting the following error: Unknown
2011 Jul 21
1
[LLVMdev] AA bug?
...ke a bug. See the line marked by '*' below: AliasAnalysis::ModRefResult AliasAnalysis::getModRefInfo(const VAArgInst *V, const Location &Loc) { // If the va_arg address cannot alias the pointer in question, then the // specified memory cannot be accessed by the va_arg. if (!alias(getLocation(V), Loc)) return NoModRef; // If the pointer is a pointer to constant memory, then it could not have been // modified by this va_arg. if (pointsToConstantMemory(Loc)) return NoModRef; ************* // Otherwise, a va_arg reads and writes. return ModRef; } ******...
2015 Feb 13
2
[LLVMdev] SIGILL in regex::assign()
Hi, I have this simple program: #include <regex> int main() { std::regex re; re.assign(std::regex("foo")); // SIGILL return 0; } It runs smoothly if compiled with g++ but raises "illegal instruction" when compiled with clang++: g++ -std=c++11 -O0 -g -o test-g++ test.cpp clang++ -std=c++11 -O0 -g -o test-clang++ test.cpp ptomulik at barakus:$ ./test-g++ ptomulik
2016 Jul 15
2
TableGen change in LLVM 3.9 allows only prefix instruction notation
Hello. I am curious why did you changed TableGen to allow in principle only writing ASM instructions in prefix notation. I ask because I personally use an assembly notation that is infix (I could use a simple preprocessor that changes prefix to infix). Just to mention: I found the solution to this - the following part of the code is responsible for this from
2016 Dec 07
2
Offset too large on scattered relocations
CCing Nick Kledzik as I posed this question on IRC and Tim Northover suggested you as a good resource for this. I came across an error due to a scattered relocation offset being larger than 2**24 and I was hoping to find more information on scattered relocations. These are MachO specific, and Ive not been able to find any documentation on them outside of source code. I have a couple of immediate
2007 Nov 19
1
Targets firing out of order
> Example class that brings on this behaviour: > > Class ldap::setup { > $loc = getLocation() #Custom function that returns a location > based on IP address fact > > case $loc { > london: { > $bind = "cn=base,dc=site,dc=com" > notice ("Target 1 - bind - ${bind}") > } > ... > defau...
2010 Jan 09
0
[LLVMdev] [PATCH] - Union types, attempt 2
On Jan 6, 2010, at 12:45 PM, Talin wrote: > This patch adds a UnionType to DerivedTypes.h. Cool. When proposing an IR extension, it is usually best to start with a LangRef.html patch so that we can discuss the semantics of the extension. Please do write this before you get much farther. I assume that you want unions usable in the same situations as a struct. However, how do "constant
2017 Dec 15
0
InstAlias with tied operands - can it be supported?
Hi, On Instructions you can use checkEarlyTargetMatchPredicate() to check that the operands are the same. There's an example of that in MipsAsmParser.cpp for DATI and DAHI. I can't think of a reason TableGen couldn't be made to allow this for InstAlias too. > On 15 Dec 2017, at 02:12, via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello, > > InstAlias
2010 Aug 21
1
error possibly related to sweave, path, and spaces on windows
...s? Here is the error: > source("D:\\My Documents\\Coombes2\\Scripts\\runAll2.R") Writing to file buildRda.cellLinesFromPredictors.tex Processing code chunks ... 1 : echo term verbatim (label=options) 2 : echo term verbatim (label=invokeMatchPredictors) 3 : echo term verbatim (label=getLocation) 4 : echo term verbatim (label=saveStuff) 5 : echo term verbatim (label=sessionInfo) You can now run LaTeX on 'buildRda.cellLinesFromPredictors.tex' Error in system(paste("C:\\Program Files\\MiKTeX 2.6\\miktex\\bin\\pdflatex", : C:\Program not found Thanks for any help. &g...