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Hi Daniel, attached is a patch that pushes most of the object file specific parsing out of AsmParser and down into MachOAsmParser. This was done as a cleanup for the ELF work. I know that you're not happy with this approach, particularly the fact that as we add more object file formats and assembler dialects, it's going to cause a class explosion. But I was hoping that we could use this

Oh, got it. Thanks for your explain. I misunderstand what getLocation does. If I would like to get the result of alias analysis referring to the stored value, what should I do in llvm? On 2/16/15 1:42 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: "Hal Finkel" <hfinkel at anl.gov> >>

Yes, in my example, %1 and %2 point to t. %3 points to t2. But t and t2 point to the same var, is it? That's where I'm confused. On 2/16/15 12:37 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: "Hal Finkel" <hfinkel at anl.gov> >> Cc: llvmdev at cs.uiuc.edu >> Sent:

Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 

So, i'm working through the last of miniscule gvn optimizations, and one of the things that gets tested is whether it will eliminate non-volatile loads in favor of ohter non-volatile loads when there are volatile loads in the way. I.E. define i32 @test1(i32* nocapture %p, i32* nocapture %q) { entry: %x = load i32, i32* %p %0 = load volatile i32, i32* %q %y = load i32, i32* %p %add =

Hi, I have a hierarchy of such classes. Subject has a list of measurements. Let assume I have a list of such 'Subject' RC's. Can I use dplyr to navigate from Subject to the list of measurement RC's and filter and group data ? dplyr should be able to call the methods on these RC's to operate on the data structure ? I tried to coerce the list of RC's into a data frame

This attempts to address http://llvm.org/bugs/show_bug.cgi?id=18220 It also fixes a test which was requiring the *wrong* output. I'm relatively happy with this part, and it even solves most of the hard part of feature request for .code16 in bug 8684 — which was actually why I started prodding at this. But I could do with some help with the 16-bit signed relocation handling, which I've

Hi, all, I am planning to add clang-tidy checkers for my company. How to add a new module for my company? Please help, thanks in advance. I try to copy files from cert module, and rename cert to Misra, then add a rule named "m-0-1-1" by ./add_new_checker.py. then I run ninja check-clang-tool, but my case is failed due to below error Running ['clang-tidy',

Hi all, I am implementing a pass which needs aliasanalysis in llvm. My pass firstly records all store or load instructions as follows: loc[cnt++] = AA.getLocation(si/li); Then, get each pairwise alias result. AliasAnalysis::AliasResult ar = AA.alias(loc[i], loc[j]); switch(ar){ case 0,1,2,3;} And the command is: opt -load mypass.so -mypass -basicaa test.bc The store/load in test.bc: (1):

Hello, InstAlias does not allow tied operands (repeated operands) in the asm string to be matched. It seems this situation is explicitly prevented in AsmMatcherEmitter.cpp: if (!Hack) PrintFatalError(TheDef->getLoc(), "ERROR: matchable with tied operand '" + Tok + "' can never be matched!");

t and t2 are two pointers defined in .c file. The definitions in .bc are: %thd = alloc i64, align 8 %t = alloca i64*, align 8 %t2 = alloca i64*, align 8 .c file likes this: int thd; int *t = &thd; int *t2 = t; On 2/16/15 12:28 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: llvmdev at cs.uiuc.edu

Hello, I am trying to emit binary for my implemented vector instructions. Although yet i havent done any change or addition in MC framework, For vector load instruction there are no error coming. But for vector add instruction is something like this; > %R_0_REG2048b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>, %R_0_REG2048b_0<kill> I am getting the following error: Unknown

I was reading the code in AliasAnalysis.cpp and happened to notice what looks like a bug. See the line marked by '*' below: AliasAnalysis::ModRefResult AliasAnalysis::getModRefInfo(const VAArgInst *V, const Location &Loc) { // If the va_arg address cannot alias the pointer in question, then the // specified memory cannot be accessed by the va_arg. if (!alias(getLocation(V),

Hi, I have this simple program: #include <regex> int main() { std::regex re; re.assign(std::regex("foo")); // SIGILL return 0; } It runs smoothly if compiled with g++ but raises "illegal instruction" when compiled with clang++: g++ -std=c++11 -O0 -g -o test-g++ test.cpp clang++ -std=c++11 -O0 -g -o test-clang++ test.cpp ptomulik at barakus:$ ./test-g++ ptomulik

Hello. I am curious why did you changed TableGen to allow in principle only writing ASM instructions in prefix notation. I ask because I personally use an assembly notation that is infix (I could use a simple preprocessor that changes prefix to infix). Just to mention: I found the solution to this - the following part of the code is responsible for this from

CCing Nick Kledzik as I posed this question on IRC and Tim Northover suggested you as a good resource for this. I came across an error due to a scattered relocation offset being larger than 2**24 and I was hoping to find more information on scattered relocations. These are MachO specific, and Ive not been able to find any documentation on them outside of source code. I have a couple of immediate

> Example class that brings on this behaviour: > > Class ldap::setup { > $loc = getLocation() #Custom function that returns a location > based on IP address fact > > case $loc { > london: { > $bind = "cn=base,dc=site,dc=com" > notice ("Target 1 - bind - ${bind}") > } > ... >

On Jan 6, 2010, at 12:45 PM, Talin wrote: > This patch adds a UnionType to DerivedTypes.h. Cool. When proposing an IR extension, it is usually best to start with a LangRef.html patch so that we can discuss the semantics of the extension. Please do write this before you get much farther. I assume that you want unions usable in the same situations as a struct. However, how do "constant

Hi, On Instructions you can use checkEarlyTargetMatchPredicate() to check that the operands are the same. There's an example of that in MipsAsmParser.cpp for DATI and DAHI. I can't think of a reason TableGen couldn't be made to allow this for InstAlias too. > On 15 Dec 2017, at 02:12, via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello, > > InstAlias

I have downloaded a file that I don't know how to describe correctly. It contains R code and Latex, and I should be able to reproduce an analysis by running an R script in this folder. There is a line in the R script: junk <- system(paste("/usr/texbin/pdflatex ",latexFiles[i1]), intern=TRUE) that needs to be modified to run on my computer. I use WinEdt with