search for: getintptrconst

Displaying 18 results from an estimated 18 matches for "getintptrconst".

2012 Aug 24
5
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...; > * Have the original getPointerTy implementation with no > > >> arguments > > >> > query for the default address space. > > >> > > > >> > In SelectionDAG > > >> > > > >> > * Add a new API to getIntPtrConstant that takes an > address > > >> space as > > >> > the second argument > > >> > > >> Do we actually need this API? Normally, if you need a > > >> pointer-sized constant, it means you have a value of pointer type > > >>...
2012 Aug 17
2
[LLVMdev] RFC: Supporting different sized address space arithmetic
...ace, this defaults to 0. * Add a virtual API call that returns the default address space for the target, this defaults to returning 0. * Have the original getPointerTy implementation with no arguments query for the default address space. In SelectionDAG * Add a new API to getIntPtrConstant that takes an address space as the second argument * Modify the implementation of the original getIntPtrConstant function to call the new function with getDefaultAddressSpace(). Modify SelectionDAGBuilder::visitGetElementPtr to get the address space of pointer argument and passing it i...
2012 Aug 25
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...le a few more nodes(IntToPtr/PtrToInt) and >> atomics, but this already works for what we want to do. Why do we need the change in lib/CodeGen/Analysis.cpp? If TargetLowering::getValueType() doesn't work for arbitrary address spaces, you should fix it. I think my earlier comments about getIntPtrConstant still hold: instead of "DAG.getIntPtrConstant(Offset, addrSpace)", you can just write "DAG.getConstant(Offset, PtrTy)". + EVT NewPtrVT = TLI.getPointerTy(dyn_cast<PointerType>( + SV->getType())->getAddressSpace()); + if (PtrVT != NewPtrVT) { + // Chec...
2012 Aug 17
2
[LLVMdev] RFC: Supporting different sized address space arithmetic
...er type, but on non-OpenCL systems, this behavior might not be warranted. > > > * Have the original getPointerTy implementation with no > arguments > > query for the default address space. > > > > In SelectionDAG > > > > * Add a new API to getIntPtrConstant that takes an address > space as > > the second argument > > Do we actually need this API? Normally, if you need a pointer-sized > constant, it means you have a value of pointer type somewhere nearby; > it's probably easier to just use the existing API which takes a co...
2012 Aug 27
2
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...t; > no > > > > >> arguments > > > > >> > query for the default address space. > > > > >> > > > > > >> > In SelectionDAG > > > > >> > > > > > >> > * Add a new API to getIntPtrConstant that takes an > > > address > > > > >> space as > > > > >> > the second argument > > > > >> > > > > >> Do we actually need this API? Normally, if you need a > > > > >> pointer-sized constant, i...
2012 Aug 17
0
[LLVMdev] RFC: Supporting different sized address space arithmetic
...et, this defaults to returning 0. Under what circumstances would the default address space for a target not be 0? > · Have the original getPointerTy implementation with no arguments > query for the default address space. > > In SelectionDAG > > · Add a new API to getIntPtrConstant that takes an address space as > the second argument Do we actually need this API? Normally, if you need a pointer-sized constant, it means you have a value of pointer type somewhere nearby; it's probably easier to just use the existing API which takes a constant and a type than to try...
2012 Aug 24
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...ion with > > > >> > no > > > >> arguments > > > >> > query for the default address space. > > > >> > > > > >> > In SelectionDAG > > > >> > > > > >> > * Add a new API to getIntPtrConstant that takes an > > address > > > >> space as > > > >> > the second argument > > > >> > > > >> Do we actually need this API? Normally, if you need a > > > >> pointer-sized constant, it means you have a value of po...
2012 Aug 27
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...> >> arguments > > > > > >> > query for the default address space. > > > > > >> > > > > > > >> > In SelectionDAG > > > > > >> > > > > > > >> > * Add a new API to getIntPtrConstant that takes > > > > > >> > an > > > > address > > > > > >> space as > > > > > >> > the second argument > > > > > >> > > > > > >> Do we actually need this API? Normally, if y...
2018 Apr 10
1
64 bit mask in x86vshuffle instruction
...sShuffleEquivalent(V1, V2, Mask, {0, 1, 2, 3, 4, 5, 6, 7, 12, 13, 14, 15,16,17,18,19})) { MVT SubVT = MVT::getVectorVT(VT.getVectorElementType(), 16); SDValue LoV = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, V1, DAG.getIntPtrConstant(0, DL)); SDValue HiV = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, OnlyUsesV1 ? V1 : V2, DAG.getIntPtrConstant(0, DL)); return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, LoV, HiV); } assert(WidenedMask.size() == 16); //...
2012 Aug 30
2
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
...nt) and > >> atomics, but this already works for what we want to do. > > Why do we need the change in lib/CodeGen/Analysis.cpp? If > TargetLowering::getValueType() doesn't work for arbitrary address > spaces, you should fix it. > > I think my earlier comments about getIntPtrConstant still hold: > instead of "DAG.getIntPtrConstant(Offset, addrSpace)", you can just > write "DAG.getConstant(Offset, PtrTy)". > > + EVT NewPtrVT = TLI.getPointerTy(dyn_cast<PointerType>( > + SV->getType())->getAddressSpace()); > + if (Ptr...
2012 Oct 26
1
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP.
...// Sanity check. assert(VA.isMemLoc()); // Get the stack pointer if needed. if (StackPtr.getNode() == 0) { StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, getPointerTy()); } SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, DAG.getIntPtrConstant(VA.getLocMemOffset())); MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo(),false, false, 0)); } ... [2]: LowerFormalArguments ... if (VA.isRegLoc()) { // Arguments passed in registers. const TargetRegisterClass *RC = ARC::CPURegs...
2015 May 12
2
[LLVMdev] how to do make a FP_ROUND need/operattion
Hi Guys, I and trying to covert a float to a f16. calling DAG.getNode(ISD::FP_ROUND, DL, Op->getValueType(0), FloatNode); will get the error message:"Invalid method to make FP_ROUND node" what is the "right" way to make this work? best Kevin -------------- next part -------------- An HTML attachment was scrubbed... URL:
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...EltVT = LHS.getValueType().getVectorElementType(); + DebugLoc dl = Op.getDebugLoc(); + SmallVector<SDValue, 8> Ops(NumElems); + for (unsigned i = 0; i < NumElems; ++i) { + SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS, + DAG.getIntPtrConstant(i)); + SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS, + DAG.getIntPtrConstant(i)); + Ops[i] = DAG.getNode(ISD::SETCC, dl, TLI.getSetCCResultType(TmpEltVT), + LHSElem, RHSElem, CC); + Ops[i] = DAG.getNode...
2013 Dec 17
3
[LLVMdev] Trying to use patchpoint in MCJIT
Hi all, I'm trying to play with patchoint (with MCJIT and VMKit) and I don't understand something. I generate this call for my first patch point. Basically, I want to call f(0). %5 = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64( i64 42, ;; patch point id is 42 i32 0, ;; 0 bytes for the padding i8* bitcast (i32 (i32)* @f to i8*), ;; my function f i32 1,
2006 Dec 19
3
[LLVMdev] alias-aware scheduling
...t Value *SV, SDOperand Root, + const Value *PtrV, int Offset, bool isVolatile); + void getStoreTo(SDOperand Src, const Value *SrcV, + SDOperand Ptr, const Value *PtrV, + int Offset, bool isVolatile); + SDOperand getIntPtrConstant(uint64_t Val) { return DAG.getConstant(Val, TLI.getPointerTy()); } @@ -1814,28 +1962,28 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) { SDOperand Ptr = getValue(I.getOperand(0)); + setValue(&I, getLoadFrom(I.getType(), Ptr, I.getOperand(0), +...
2014 Mar 07
3
[LLVMdev] [RFC] Add second "failure" AtomicOrdering to cmpxchg instruction
...t/ARM/ARMISelLowering.cpp index 691961e..aa7ca7f 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -6054,10 +6054,10 @@ ReplaceATOMIC_OP_64(SDNode *Node, SmallVectorImpl<SDValue>& Results, Node->getOperand(i), DAG.getIntPtrConstant(1))); } SDVTList Tys = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other); - SDValue Result = - DAG.getAtomic(Node->getOpcode(), dl, MVT::i64, Tys, Ops.data(), Ops.size(), - cast<MemSDNode>(Node)->getMemOperand(), AN->getOrdering(), - AN->...