Displaying 3 results from an estimated 3 matches for "getintegerwidth".
2011 Mar 13
1
[LLVMdev] backend question
...it includes changes in
> which you probably aren't interested (support for non-power-of-2
> integer sizes and some other bug fixes).
I would be interested in non-power-of-two support. I started adding
the very basics for i24 in my STM8 repo but there are still a couple
places that do getIntegerWidth() * 2 calculations for expansion.
Do you have a public repo and/or plans to merge those features into
trunk?
Andreas
2011 Mar 08
0
[LLVMdev] backend question
On Tue, Mar 8, 2011 at 5:14 AM, Jacques Van Damme
<Jacques.VanDamme at synopsys.com> wrote:
> I am writing a backend for an architecture that has only 16-bit word
> addressing (No byte addresses ever. All data are always 16-bit).
>
> How can I specify this in the backend?
In short, you can't. Word-addressable memory is not currently
supported in LLVM (or Clang, for that
2011 Mar 08
3
[LLVMdev] backend question
Hi All,
I am writing a backend for an architecture that has only 16-bit word addressing (No byte addresses ever. All data are always 16-bit).
How can I specify this in the backend?
As an example, consider the following instruction:
%arrayidx = getelementptr [129 x i16]* @flags, i16 0, i16 %i.043
When I generate assembler code, this now results in %i.043 being multiplied by 2 in the address