search for: getinstructionindex

Displaying 14 results from an estimated 14 matches for "getinstructionindex".

2004 Aug 27
2
[LLVMdev] Register allocator assert
Hello, I'm getting an assertion in register allocator, specifically in LiveIntervalAnalysis.h, method LiveIntervals::getInstructionIndex: unsigned getInstructionIndex(MachineInstr* instr) const { Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); assert(it != mi2iMap_.end() && "Invalid instruction!"); return it->second; } The crash happens when the function is called from LiveInterva...
2004 Aug 27
0
[LLVMdev] Register allocator assert
On Fri, 2004-08-27 at 08:05, Vladimir Prus wrote: > Hello, > I'm getting an assertion in register allocator, specifically in > LiveIntervalAnalysis.h, method LiveIntervals::getInstructionIndex: > > unsigned getInstructionIndex(MachineInstr* instr) const { > Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); > assert(it != mi2iMap_.end() && "Invalid instruction!"); > return it->second; > } Hello Vladimir, Can you checkou...
2008 Feb 11
0
[LLVMdev] Some questions about live intervals
...;0)) ? (I-1): I; > + > + assert(J != Idx2MBBMap.end() && J->first < index+1 && > + index < getMBBEndIdx(J->second) && > + "index does not correspond to an MBB"); > + return J->second; > + } > + > /// getInstructionIndex - returns the base index of instr > unsigned getInstructionIndex(MachineInstr* instr) const { > Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://ll...
2008 Feb 08
2
[LLVMdev] Some questions about live intervals
Hi Evan, Here is a patch for the LiveIntervalAnalysis that we discussed. --- Evan Cheng <evan.cheng at apple.com> schrieb: > > 1) What is the easiest way to understand which MBB a given > instruction index belongs to? All the required information is > available in the > > MBB2IdxMap of the LiveIntervalAnalysis class. Would it be useful > to add a small function
2008 Feb 11
2
[LLVMdev] Some questions about live intervals
...assert(J != Idx2MBBMap.end() && J->first < index+1 && > > + index < getMBBEndIdx(J->second) && > > + "index does not correspond to an MBB"); > > + return J->second; > > + } > > + > > /// getInstructionIndex - returns the base index of instr > > unsigned getInstructionIndex(MachineInstr* instr) const { > > Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); > > _______________________________________________ > > LLVM Developers mailing list > > LLVMdev at cs.u...
2011 Jan 20
0
[LLVMdev] [LLVMDev] Live Intervals and Finding the next usage
...egister around the given slot index Min. Is there a better way than the linear search: ... findDefUsesAroundIndex( LiveInterval* li, SlotIndex Min ) ... for( MachineOperand * mo = MRI->getRegUseDefListHead(li->reg); mo; mo = mo->getNextOperandForReg() ) { SlotIndex si = SI->getInstructionIndex( use.getOperand().getParent() ); if( Min.distance(si) >= 0 ) ... - Thanks Jeff Kunkel On Thu, Jan 20, 2011 at 8:37 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > I have a live interval, and I would like to find out what SlotIndex the > next use the register will occur? Is th...
2011 Jan 20
4
[LLVMdev] [LLVMDev] Live Intervals and Finding the next usage
I have a live interval, and I would like to find out what SlotIndex the next use the register will occur? Is there any way to map a live interval back into instructions or SlotIndexes or blocks used by? - Thanks Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110120/fd429dbd/attachment.html>
2008 Feb 12
0
[LLVMdev] Some questions about live intervals
...Idx2MBBMap.end() && J->first < index+1 && >>> + index < getMBBEndIdx(J->second) && >>> + "index does not correspond to an MBB"); >>> + return J->second; >>> + } >>> + >>> /// getInstructionIndex - returns the base index of instr >>> unsigned getInstructionIndex(MachineInstr* instr) const { >>> Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); >>> _______________________________________________ >>> LLVM Developers mailing list >>> LL...
2012 Aug 31
0
[LLVMdev] Assert in LiveInterval update
...*Roots; for (MachineRegisterInfo::use_nodbg_iterator UI = MRI.use_nodbg_begin(Root), UE = MRI.use_nodbg_end(); UI != UE; UI.skipInstruction()) { const MachineInstr* MI = &*UI; SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI); if (InstSlot > LastUse && InstSlot < OldIdx) LastUse = InstSlot; } //for (MCSuperRegIterator Supers(Root, &TRI); Supers.isValid(); ++Supers) // I do not think we should be doing this here. } } else { for (...
2016 Nov 27
5
Extending Register Rematerialization
...er(MO.getReg())) { if (MRI.isConstantPhysReg(MO.getReg(), *DefMI->getParent()->getParent())) continue; //If not constant then check its def if(depth > 6) return false; LiveInterval &li = LIS.getInterval(MO.getReg()); SlotIndex UseIdx = LIS.getInstructionIndex(*DefMI); VNInfo *UseVNInfo = li.getVNInfoAt(UseIdx); MachineInstr *NewDefMI = LIS.getInstructionFromIndex(UseVNInfo->def); if(!checkComplexRematerializable(UseVNInfo, NewDefMI, depth+1, aa)) return false; } } Remattable.insert(VNI); //May have to add new da...
2012 Aug 31
2
[LLVMdev] Assert in LiveInterval update
Hi Lang, Just one more quick question. in LiveIntervalAnalysis.cpp In SlotIndex findLastUseBefore(unsigned Reg, SlotIndex OldIdx) Did you really mean to use for (MachineRegisterInfo::use_nodbg_iterator UI = MRI.use_nodbg_begin(Reg), UE = MRI.use_nodbg_end(); UI != UE; UI.skipInstruction()) {} Aren't we currently dealing with units,
2010 Nov 04
0
[LLVMdev] slot-indexes, liveranges...
...time trying to figure out the scheme behind the slotindexing / liverange design. There seems to be several indexes mapped to the same instruction. Why is this? I take it, that it will always be true that for a LiveRange includes instructions with slotindexes [i:j), based on calls to SlotIndexes::getInstructionIndex(MI) ? However, LiveRange.valno->def, gives an earlier index than what is returned from the method above... Is there any overview doc on this? Best regards, Jonas -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/...
2012 Sep 03
2
[LLVMdev] Assert in LiveInterval update
...; > UI = MRI.use_nodbg_begin(Root),**** > > UE = MRI.use_nodbg_end();**** > > UI != UE; UI.skipInstruction()) {**** > > const MachineInstr* MI = &*UI;**** > > SlotIndex InstSlot = > LIS.getSlotIndexes()->getInstructionIndex(MI);**** > > if (InstSlot > LastUse && InstSlot < OldIdx) **** > > LastUse = InstSlot;**** > > }**** > > //for (MCSuperRegIterator Supers(Root, &TRI); Supers.isValid(); > ++Supers) **** > > // I do not t...
2016 Dec 22
5
Understanding SlotIndexes
...tracking down a register allocation problem and I'm trying to understand this piece of code in InlineSpiller::spillAroundUses: // Find the slot index where this instruction reads and writes OldLI. // This is usually the def slot, except for tied early clobbers. SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot(); if (VNInfo *VNI = OldLI.getVNInfoAt(Idx.getRegSlot(true))) if (SlotIndex::isSameInstr(Idx, VNI->def)) Idx = VNI->def; Comments in SlotIndexes.h have this to say: /// Early-clobber register use/def slot. A live range defined at /// Slot_Early...