search for: getindex

Displaying 20 results from an estimated 57 matches for "getindex".

Did you mean: get_index
2016 Jan 14
0
[PATCH] nv50/ir: rebase indirect temp arrays to 0, so that we use less lmem space
...gt;indirectTempBases.find(arrayId); + if (it == code->indirectTempBases.end()) + return; + + idx2d = 1; + idx += it->second.newBase - it->second.oldBase; +} + Value * Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr) { int idx2d = src.is2D() ? src.getIndex(1) : 0; - const int idx = src.getIndex(0); + int idx = src.getIndex(0); const int swz = src.getSwizzle(c); Instruction *ld; @@ -1728,8 +1759,7 @@ Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr) int arrayid = src.getArrayId(); if (!arrayid)...
2013 May 03
1
[LLVMdev] slotindex:getIndex
HI Is there a public function equivalent of calling getIndex I would like to use some sort of starting slot info of a live interval in some pass. I need a way of comparing which virtual register is associated with an earlier source line without relying on any debug info. The relative order is preserved in my case. thanks shrey
2016 Jan 14
0
[PATCH] nv50/ir: only use FILE_LOCAL_MEMORY for temp arrays that use indirection
...0 ? &tData : &lData; case TGSI_FILE_PREDICATE: return &pData; case TGSI_FILE_ADDRESS: @@ -1662,7 +1682,7 @@ Converter::shiftAddress(Value *index) Value * Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr) { - const int idx2d = src.is2D() ? src.getIndex(1) : 0; + int idx2d = src.is2D() ? src.getIndex(1) : 0; const int idx = src.getIndex(0); const int swz = src.getSwizzle(c); Instruction *ld; @@ -1704,6 +1724,14 @@ Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr) ld = mkOp1(OP_RDSV, TYPE_U32, getSSA(),...
2005 Aug 18
5
Sortable > how to know wich elementID was dropped ?
Maybe a newb question, maybe not. It''s not well documented, and I want to know how to know the id of my newly dropped item. The usage, would be to attach the newly dropped id to its *new* parent in a DB. Thanks. ???????????????????????? http://www.samueldr.com http://www.hostingquebec.ca
2005 Sep 23
2
Sortables: which element moved?
Looking at the archives, people have asked this before, but I can''t find a proper answer: How do you get sortable_element to return the dragged (moved) element? I know I can compare the list of elements before and after, but I need to know exactly which element was moved. The problem with comparing the list before and after is that if an element is dragged one element forward or
2006 Sep 28
2
get index of elements in vector
Hello all Is There a fuction that return a index of a element in vector? like this semantic example: vector = c( 100, 200, 300 ) getINDEX( vector, value = 200 ) Thanks in advance for your attention. Cleber Borges
2017 Oct 23
2
EnableFastISel
...ISD::BUILD_PAIR) { if (LoadSDNode *LNode = dyn_cast<LoadSDNode>(Res.getOperand(0).getNode())) if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode())) FuncInfo->setArgumentFrameIndex(&Arg, FI->getIndex()); } Is it in BUG or am I missing something? Thanks, Yaniv
2019 Jun 26
2
How to handle ISD::STORE when both operands are FrameIndex?
...ack register yet and instead I just emit FrameIndex as immediate: bool MyBackendDAGToDAGISel::SelectAddrFI(SDValue &N, SDValue &R) { if (N.getOpcode() != ISD::FrameIndex) return false; MachineFrameInfo &MFI = MF->getFrameInfo(); int FX = cast<FrameIndexSDNode>(N)->getIndex(); R = CurDAG->getTargetFrameIndex(FX, MVT::i32); return true; } This way I end up with store %r1, [1] and handle it in my CPU emulator accordingly. So, instead of matching that FrameIndex in store, I really want to emit a load first and then use a register in the store instruction. Can...
2008 Dec 10
0
[LLVMdev] ARM Debug support patch
...return 0; Same for ARM::DBG_LABEL. 3. + case ISD::DECLARE: { + SDValue Chain = Op.getOperand(0); + SDValue N1 = Op.getOperand(1); + SDValue N2 = Op.getOperand(2); + + if (!isa<FrameIndexSDNode>(N1)) + break; + + int FI = cast<FrameIndexSDNode>(N1)->getIndex(); Something like this will be better: FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1); if (!FINode) break; int FI = FINode->getIndex(); I'll fix these minor issues and commit the patch for you. Thanks for your contribution! Evan On Dec 10,...
2014 Jul 29
2
[LLVMdev] to lower "write to argument pointer"
...e: (1) should I return some merges values( returnValue, DstValue) ? or only return returnValue is right? ( the dag dumped out looks better if I return the merged values) (2) How the FrameIndex should be computed? I use DAG.getFrameIndex((dyn_cast<FrameIndexSDnode>( frindex.getNode()))->getIndex(), i32), not confident it is correct, any good examples to understand to this? Best Kevin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140729/cb44e46b/attachment.html>
2014 Feb 04
2
[PATCH 1/3] nv50: rework primid logic
Functionally identical but much simpler. Should also better integrate with future layer/viewport changes/fixes. Cc: 10.1 <mesa-stable at lists.freedesktop.org> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Not *strictly* necessary in stable, but it will make backporting later fixes easier. No regressions in piglit. src/gallium/drivers/nouveau/nv50/nv50_program.c | 5
2010 Sep 25
2
[LLVMdev] Strange exception in SelectionDAGBuilder
...lder.cpp: *case* *Intrinsic*::gcroot: *if* (GFI) { *const* Value *Alloca = I.getArgOperand(0); *const* Constant *TypeMap = cast<Constant>(I.getArgOperand(1)); * FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());* GFI->addStackRoot(FI->getIndex(), TypeMap); } *return* 0; Specifically, the cast from SDNode to FrameIndexSDNode fails because the node type is DYNAMIC_STACKALLOC, while this code is expecting the node type to be "FrameIndex" or "TargetFrameIndex". (I don't know what either of these mean, I'm...
2019 Oct 14
1
[PATCH] nv50/ir: mark STORE destination inputs as used
...instruction *inst) if (insn.getOpcode() == TGSI_OPCODE_STORE && dst.getFile() != TGSI_FILE_MEMORY) { info->io.globalAccess |= 0x2; + + if (dst.getFile() == TGSI_FILE_INPUT) { + // TODO: Handle indirect somehow? + const int i = dst.getIndex(0); + info->in[i].mask |= 1; + } } if (dst.getFile() == TGSI_FILE_OUTPUT) { -- 2.21.0
2009 Jun 03
5
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
...refix() << "PC" @@ -695,12 +707,31 @@ } } + void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) { - const MachineOperand &MO1 = MI->getOperand(OpNo); - const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id - unsigned JTI = MO1.getIndex(); - O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() - << '_' << JTI << '_' << MO2.getImm() << ":\n"; + std::stringstream prefix; + + const unsigned JTI = MI->getOperand(OpNo).getInd...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...From llvm/lib/Target/X86/X86InstrFragmentsSIMD.td def mgatherv128i16 : PatFrag<(ops node:$src1, node:$src2, node:$src3), (masked_gather node:$src1, node:$src2, node:$src3) , [{ if (MaskedGatherSDNode *mgNode = dyn_cast<MaskedGatherSDNode>(N)) return (mgNode->getIndex().getValueType() == MVT::v128i16 || mgNode->getBasePtr().getValueType() == MVT::v128i16); return false; }]>; foreach RegId = 0-31 in def Mask#RegId : MipsReg<0, "Mask"#RegId>, DwarfRegNum<[!add(RegId, 10)]>; def VK128: Reg...
2010 Sep 26
0
[LLVMdev] Strange exception in SelectionDAGBuilder
...::gcroot: > > *if* (GFI) { > *const* Value *Alloca = I.getArgOperand(0); > *const* Constant *TypeMap = cast<Constant>(I.getArgOperand(1)); > * FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());* GFI->addStackRoot(FI->getIndex(), TypeMap); > } > *return* 0; > > Specifically, the cast from SDNode to FrameIndexSDNode fails because the > node type is DYNAMIC_STACKALLOC, while this code is expecting the node type > to be "FrameIndex" or "TargetFrameIndex". (I don't know what...
2012 Nov 24
2
[LLVMdev] Fwd: Prevention register promotion at the isel codegen phase
...the code snippet I used: > > // Now we know which node to spill, perform the spill. > SDValue SpillVal = Node->getOperand(OpNo); > SDValue SpillSlot = CurDAG->CreateStackTemporary(SpillVal.getValueType()); > int FI = cast<FrameIndexSDNode>(SpillSlot)->getIndex(); > SDValue Chain = CurDAG->getStore(CurDAG->getEntryNode(), > SpillVal.getDebugLoc(), > SpillVal, SpillSlot, > MachinePointerInfo::getFixedStack(FI), >...
2009 Jun 11
0
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
On Jun 8, 2009, at 2:42 PM, robert muth wrote: > On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com> > wrote: >> >> On Jun 7, 2009, at 6:59 AM, robert muth wrote: >> >>> On Sat, Jun 6, 2009 at 4:51 PM, Evan Cheng<evan.cheng at apple.com> >>> wrote: >>>> +cl::opt<std::string>
2008 Dec 10
6
[LLVMdev] ARM Debug support patch
Hi all, FlexyCore, the company I am working for, use LLVM to generate binary for ARM platform. We are very fulfilled with LLVM, and FlexyCore will be pleased to contribute on this software. We need debug support in ARM binary, but, in LLVM 2.4, this support is not activated for ARM backend. Consequently, I made small modifications in order to activate it (see the patch in attach file). My
2009 Feb 17
1
[LLVMdev] ARM backend playing with alternative jump table implementations
...DebugLoc(); MVT PTy = getPointerTy(); JumpTableSDNode *JT = cast<JumpTableSDNode>(Table); ARMFunctionInfo *AFI = DAG.getMachineFunction().getInfo<ARMFunctionInfo>(); SDValue UId = DAG.getConstant(AFI->createJumpTableUId(), PTy); SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PTy); #if 1 // @@ GET TABLE BASE: current code Table = DAG.getNode(ARMISD::WrapperJT, MVT::i32, JTI, UId); #else // @ MY ATTEMPT AT MOVING THIS OUT ARMConstantPoolValue *CPV = new ARMConstantPoolValue("a_jump_table", 666); SDValue TableValue = DAG.getTargetConstantPool(CPV, PT...