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Dear Tim, Thank you for your thorough reply. So, based on your reply I get every operand and check them to be (isDef && !isimplicit). Now my problem is that it gives me the physical register number.i.e, for example, instead of r0, it return %physreg66. Could you please help me on how to convert these physical register number to the ARM related register? I mean the 15 GPRs in ARM. Thank

Thank you :) If you mean this field, it looks everything is ok: field bits<16> Inst = { 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, Dr{2}, Dr{1}, Dr{0}, At{0}, 0, 0 }; Is possible that the problem might be on the TestAsmParser.cpp side? On Thu, Sep 17, 2015 at 4:18 PM, Krzysztof Parzyszek via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 9/17/2015 9:04 AM, Krzysztof Parzyszek via llvm-dev