search for: getdebugloc

Displaying 20 results from an estimated 156 matches for "getdebugloc".

2015 May 13
2
[LLVMdev] Modifying debug information through llvm pass
...odified debug information. I've tried to change by using the following code snippet: MDNode *N = Inst->getMetadata("dbg"); DebugLoc Loc = DebugLoc::get(newLine, newCol, N); Inst->setDebugLoc(Loc); I read the DebugLoc back by using const DebugLoc D = Inst->getDebugLoc(); unsigned Line = D.getLine(); outs() << Line <<"\n"; But I can't set the debug info correctly. How can I change the debug info correctly through llvm pass? Thanks Riyad -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://...
2017 Jun 09
2
Get segfault with ModulePass
...DebugPass() : ModulePass(ID) {} virtual bool runOnModule(Module &M) override { DILocation* loc; for (auto &F : M) { for (auto &B : F) { for (auto &I : B) { errs() << "op_code: " << I.getOpcodeName() << '\n'; loc = I.getDebugLoc(); if (loc != nullptr) { errs() << "file: " << loc->getFilename() << '\n'; } for (const auto& use : I.uses()) { if (const CallInst* c = dyn_cast<CallInst>(use.getUser())) { const Function* f = c->getCalledFu...
2020 Jul 08
2
Extracting the !dbg property from LLVM IR function calls
...e to extract the 69 from this line in my LLVM pass, but when I dump() the corresponding CallInst, I see the following: %1 = tail call i1 @llvm.type.test(i8* bitcast (i32 (i32)* @_Z5otheri to i8*), metadata !"_ZTSFiiE") #5, *!dbg !29*, !nosanitize !2 And finally, the line *CallInst -> getDebugLoc() -> getLine()* returns *61* for this call, not 69 or 29. Am I misunderstanding the purpose of getDebugLoc() for a CallInst? Is there any way I can extract the correct !dbg for a given line? Thanks for your help! Best, Shishir Jessu -------------- next part -------------- An HTML attachment wa...
2012 Nov 24
2
[LLVMdev] Fwd: Prevention register promotion at the isel codegen phase
...d(OpNo); > SDValue SpillSlot = CurDAG->CreateStackTemporary(SpillVal.getValueType()); > int FI = cast<FrameIndexSDNode>(SpillSlot)->getIndex(); > SDValue Chain = CurDAG->getStore(CurDAG->getEntryNode(), > SpillVal.getDebugLoc(), > SpillVal, SpillSlot, > MachinePointerInfo::getFixedStack(FI), > false, false, 0); > Chain = CurDAG->getLoad(SpillVal.getValueType(), SpillVal.getDebugLoc(), >...
2010 Oct 02
1
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
...dbgs()<< '\n'); >> WorkListRemover DeadNodes(*this); >> DAG.ReplaceAllUsesOfValueWith(N1, Tmp,&DeadNodes); >> removeFromWorkList(TheXor); >> DAG.DeleteNode(TheXor); >> return DAG.getNode(ISD::BRCOND, N->getDebugLoc(), >> MVT::Other, Chain, Tmp, N2); >> } >> } >> >> if (Op0.getOpcode() != ISD::SETCC&& Op1.getOpcode() != ISD::SETCC) { >> bool Equal = false; >> if (ConstantSDNode *RHSCI = dyn_cast<Con...
2009 Dec 10
2
[LLVMdev] SplitVecRes with SIGN_EXTEND_INREG unsupported
...rking. Thanks for the help, does this look correct to you? void DAGTypeLegalizer::SplitVecRes_SIGN_EXTEND_INREG(SDNode *N, SDValue &Lo, SDValue &Hi) { SDValue LHSLo, LHSHi; GetSplitVector(N->getOperand(0), LHSLo, LHSHi); DebugLoc dl = N->getDebugLoc(); EVT LoVT, HiVT; GetSplitDestVTs(N->getValueType(1), LoVT, HiVT); Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, DAG.getValueType(LoVT)); Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, DAG.getValueType(HiVT)); } Thanks, Micah > -----Or...
2017 Jun 20
2
CloneFunctionInto produces invalid debug info
I was just going to say: With well-formed debug info it should create a deep copy up until the DISubprogram, but no further. But because the DISubprogram linked to the Function is missing the special handling of the DISubprogram (that would prohibit cloning the DICompileUnit is side-stepped). But then I remembered the discussion we had in
2009 Dec 10
0
[LLVMdev] SplitVecRes with SIGN_EXTEND_INREG unsupported
...t; look correct to you? > > void DAGTypeLegalizer::SplitVecRes_SIGN_EXTEND_INREG(SDNode *N, SDValue > &Lo, > SDValue &Hi) { > SDValue LHSLo, LHSHi; > GetSplitVector(N->getOperand(0), LHSLo, LHSHi); > DebugLoc dl = N->getDebugLoc(); > EVT LoVT, HiVT; > GetSplitDestVTs(N->getValueType(1), LoVT, HiVT); > > Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, > DAG.getValueType(LoVT)); > Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, > DAG.getValueType(HiVT...
2011 Oct 12
1
[LLVMdev] Problem in TwoAddressInstructionPass::runOnMachineFunction regarding subRegs
...unsigned regASubIdx = mi->getOperand(DstIdx).getSubReg(); TII->reMaterialize(*mbbi, mi, regA, regASubIdx, DefMI, *TRI); ReMatRegs.set(TargetRegisterInfo::virtReg2Index(regB)); ++NumReMats; } else { - BuildMI(*mbbi, mi, mi->getDebugLoc(), TII->get(TargetOpcode::COPY), - regA).addReg(regB); + unsigned regASubIdx = mi->getOperand(DstIdx).getSubReg(); + if (regASubIdx) { + BuildMI(*mbbi, mi, mi->getDebugLoc(), + TII->get(TargetOpcode::COPY)). +...
2009 Dec 11
1
[LLVMdev] SplitVecRes with SIGN_EXTEND_INREG unsupported
...DAGCombiner.cpp:3033. // fold (sext (truncate x)) -> (sextinreg x). if (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, N0.getValueType())) { if (Op.getValueType().bitsLT(VT)) Op = DAG.getNode(ISD::ANY_EXTEND, N0.getDebugLoc(), VT, Op); else if (Op.getValueType().bitsGT(VT)) Op = DAG.getNode(ISD::TRUNCATE, N0.getDebugLoc(), VT, Op); return DAG.getNode(ISD::SIGN_EXTEND_INREG, N->getDebugLoc(), VT, Op, DAG.getValueType(N0.getValueType())); } One question is, should thi...
2009 Jul 17
2
[LLVMdev] Bug in LiveIntervals? Please Examine
...MachineBasicBlock *RMBB = RMI->getParent(); if (RMBB == MBB) continue; const TargetRegisterClass* RC = mri_->getRegClass(Reg); unsigned NewVReg = mri_->createVirtualRegister(RC); MachineInstrBuilder MIB = BuildMI(*RMBB, RMI, RMI->getDebugLoc(), tii_->get(TargetInstrInfo::IMPLICIT_DEF), NewVReg); (*MIB).getOperand(0).setIsUndef(); RMO.setReg(NewVReg); RMO.setIsUndef(); RMO.setIsKill(); } Souldn't there be a call to vrm.grow() after each call to mri->createVirtualRegiste...
2017 Feb 13
2
ARM Backend: Emit conditional move
...is, I first emit a compare instruction and then I'm trying to emit the conditional move, which is failing. BuildMI(&MBB, DL, TII->get(ARM::CMPrr)) .addReg(MI.getOperand(1).getReg()) .addReg(MI.getOperand(2).getReg()) .addImm(ARMCC::EQ); BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVr), MI.getOperand(0).getReg()) .addImm(ARMCC::EQ) .addImm(1) .addReg(0); // 's' bit But with the last conditional move, I am a bit lost. The result of the condional move should be saved in operand 0. Can someone help o...
2015 Nov 22
2
BuildMI crashes on a certain probability on the exact same test
Dear there, I'm trying to call BuildMI in my backend to add a machineinstr. BuildMI(MBB, I, I->getDebugLoc(), TII->get(Vanilla::MOV), Vanilla::R1).addReg(MI->getOperand(1).getReg()); But it gives me an error like this: 0 clang 0x000000010e61a56e llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 46 1 clang 0x000000010e61c209 PrintStackTraceSignalHandler(...
2018 Sep 19
2
Obtaining the origin function for a local var after inlining
...to figure out which inlined function a local var > > originally belonged to in the source file. > > If you are looking at a llvm.dbg.declar/value/addr intrinsic, then the DILocation attached to the intrinsic indirectly points there: > > DIScope *Scope = DILocation(dbg_intrinsic.getDebugLoc()).getScope(); > while (!isa<DISubprogram>(Scope)) > Scope = Scope->getScope(); > auto *origFunction = cast<DIFunction>(Scope); This works, thank you! (I had to slightly modify the code FWIW: DILocation *DIL = dbg_intrinsic.getDebugLoc(); if (DIL) { DI...
2012 Nov 24
0
[LLVMdev] Fwd: Prevention register promotion at the isel codegen phase
...d(OpNo); > SDValue SpillSlot = CurDAG->CreateStackTemporary(SpillVal.getValueType()); > int FI = cast<FrameIndexSDNode>(SpillSlot)->getIndex(); > SDValue Chain = CurDAG->getStore(CurDAG->getEntryNode(), > SpillVal.getDebugLoc(), > SpillVal, SpillSlot, > > MachinePointerInfo::getFixedStack(FI), > false, false, 0); > Chain = CurDAG->getLoad(SpillVal.getValueType(), SpillVal.getDebugLoc(), &g...
2013 Mar 04
1
[LLVMdev] Custom Lowering of ARM zero-extending loads
...dSDNode>(Op.getNode()); ISD::LoadExtType ExtType = LD->getExtensionType(); if (LD->getExtensionType() == ISD::ZEXTLOAD) { DEBUG(errs() << "ZEXTLOAD\n"); SDValue Chain = LD->getChain(); SDValue Ptr = LD->getBasePtr(); DebugLoc dl = Op.getNode()->getDebugLoc(); SDValue LdResult = DAG.getExtLoad(ISD::EXTLOAD, dl, MVT::i32, Chain, Ptr, LD->getPointerInfo(), MVT::i32, LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());...
2015 Dec 15
4
Line number without -Debug ?
Hi Eric and thanks for your answer, What I mean is that I want to find the number of line on the IR code of a specific instruction. I found out that I can use: DebugLoc Loc = CurrentInstruction->getDebugLoc(); unsigned Line = Loc.getLine(); But this works only if DEBUGFLAG is True. I'd like to be able to get the Line number without being on a 'Debug' mode. Is this possible? Thanks again, -irini On 15/12/2015 09:37, Eric Christopher wrote: > Not sure what you mean, but the...
2015 Feb 11
2
[LLVMdev] deleting or replacing a MachineInst
...k surgery of replacing the old MachineInst. The peephole pass gets called per MachineFunction and then iterates over each MachineBasicBlock and in turn over each MachineInst. When it finds an instruction which should be replaced, it builds a new instruction: NewMI = BuildMI(*MBB, MBBI, MBBI->getDebugLoc(), TII->get(X86::opcode)) .addReg(X86::new_reg, kill) .addImm(i); This works and it correctly places the new instruction just before the old instruction in the assembly output. So far so good. Now I have to remove the old instruction. But everything I try crashes LLVM, either immediate...
2010 Sep 30
4
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
...etNode()->dump(&DAG); dbgs() << '\n'); WorkListRemover DeadNodes(*this); DAG.ReplaceAllUsesOfValueWith(N1, Tmp, &DeadNodes); removeFromWorkList(TheXor); DAG.DeleteNode(TheXor); return DAG.getNode(ISD::BRCOND, N->getDebugLoc(), MVT::Other, Chain, Tmp, N2); } } if (Op0.getOpcode() != ISD::SETCC && Op1.getOpcode() != ISD::SETCC) { bool Equal = false; if (ConstantSDNode *RHSCI = dyn_cast<ConstantSDNode>(Op0)) if (RHSCI->getAPIntValue() =...
2013 Jul 31
1
[LLVMdev] Help with promotion/custom handling of MUL i32 and MUL i64
...the following as well: SDValue LHS = Op.getOperand(0); SDValue RHS = Op.getOperand(1); LHS = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, LHS); RHS = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, RHS); return DAG.getNode(XXXISD::MUL32, Op->getDebugLoc(), MVT::i64, LHS, RHS); In order to get the operation to be able to be able to go forward and match the new operation with the input operands (which were still I32 and not yet type-legalized to i64). Does this make sense to you? Here's what I am using to generate the XXXISD::MUL32: if(Op...