Displaying 6 results from an estimated 6 matches for "getcostfordef".
2012 Aug 21
2
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers
...DR:$b),
DR:$b),
sub_even)>;
3. These are selected in a simple testcase:
define i32 @div(i32 %a, i32 %b) nounwind readnone {
entry:
%div = sdiv i32 %a, %b ; <i32> [#uses=1]
ret i32 %div
}
4. Instruction Scheduling calls GetCostForDef (in
ScheduleDAGRRList.cpp) when hitting the EXTRACT_SUBREG-Node introduced
by the Pattern above.
5. GetCostForDef crashes here, as getRepRegClassFor(VT /* == MVT::i64
*/) returns NULL:
RegClass = TLI->getRepRegClassFor(VT)->getID();
For LLVM versions before 3.1 this did not happen (I don...
2012 Aug 21
0
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers
...sub_even)>;
>
> 3. These are selected in a simple testcase:
>
> define i32 @div(i32 %a, i32 %b) nounwind readnone {
> entry:
> %div = sdiv i32 %a, %b ; <i32> [#uses=1]
> ret i32 %div
> }
>
> 4. Instruction Scheduling calls GetCostForDef (in
> ScheduleDAGRRList.cpp) when hitting the EXTRACT_SUBREG-Node introduced
> by the Pattern above.
>
> 5. GetCostForDef crashes here, as getRepRegClassFor(VT /* == MVT::i64
> */) returns NULL:
>
> RegClass = TLI->getRepRegClassFor(VT)->getID();
This isn't really my...
2012 Jun 13
2
[LLVMdev] Instructions working on 64bit registers without true support for 64bit operations
...ation, for instance. In the tablegen files these registers
and the corresponding register class are modelled accordingly and the
instruction selector also selects them.
The paired 64bit register class is however not added within the
constructor of the TriCoreTargetLowering class. So, at some point
GetCostForDef is called for a MVT::i64 in connection with a division
instruction and this call segfaults as there just is no matching
register class available for TriCore.
Unfortunately, just adding the register class for MVT::i64 does not
help either. In that case the code generation framework assumes that
the...
2012 Aug 20
0
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers
On Mon, Aug 20, 2012 at 12:01 AM, Fabian Scheler
<fabian.scheler at gmail.com> wrote:
> Hi Eli,
>
>>>>> 2. Storing arbitrary sized integers
>>>>>
>>>>> The testcase "test/CodeGen/Generic/APIntLoadStore.ll" checks for
>>>>> loading/storing e.g. i33 integers from/into global variable. The
>>>>> questions
2012 Aug 20
2
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers
Hi Eli,
>>>> 2. Storing arbitrary sized integers
>>>>
>>>> The testcase "test/CodeGen/Generic/APIntLoadStore.ll" checks for
>>>> loading/storing e.g. i33 integers from/into global variable. The
>>>> questions are the same as regarding feature 1: How important is this
>>>> feature? Is it save to ignore it? Is there
2012 Jun 13
0
[LLVMdev] Instructions working on 64bit registers without true support for 64bit operations
...blegen files these registers
> and the corresponding register class are modelled accordingly and the
> instruction selector also selects them.
>
> The paired 64bit register class is however not added within the
> constructor of the TriCoreTargetLowering class. So, at some point
> GetCostForDef is called for a MVT::i64 in connection with a division
> instruction and this call segfaults as there just is no matching
> register class available for TriCore.
>
> Unfortunately, just adding the register class for MVT::i64 does not
> help either. In that case the code generation f...