Displaying 4 results from an estimated 4 matches for "getconstantoperandv".
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getconstantoperandval
2015 Feb 16
2
[LLVMdev] LLVM Backend
I am working on LLVM backend and was wondering if there is any way by which
I can access the value stored SDValue so I can either assign it as a
literal or move it to register in an user defined instruction.
Something like:
SDValue Value = Op->getOperand(2);
intValue = Value.get_integer_value //get Value as an int
and then
if ( intValue > 31)
Thanks,
Ambuj
-------------- next part
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...quot;);
- case ISD::FP_ROUND:
- switch (getTypeAction(Node->getOperand(0).getValueType())) {
- case Expand: assert(0 && "BUG: Cannot expand FP regs!");
- case Promote: assert(0 && "Unreachable with 2 FP types!");
- case Legal:
- if (Node->getConstantOperandVal(1) == 0) {
- // Input is legal? Do an FP_ROUND_INREG.
- Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Node->getOperand(0),
- DAG.getValueType(VT));
- } else {
- // Just remove the truncate, it isn't affecting the value.
- R...