search for: getcalleesavedreg

Hi Marcello, Thanks for your reply. I will try to pass down the mask! I have one more question. In my backend I return CSR_RegMask in getCallPreservedMask and return CSR_SaveList in getCalleeSavedRegs. Is that a correct setup? I dumped the regmask and found that callee saved regs are marked 1 and non-callee saved regs are 0. Thanks, Xiaochu On Wed, Aug 26, 2015 at 5:58 PM Marcello Maggioni <mmaggioni at apple.com> wrote: > Is the preserved mask passed down to your Call instruction...

Hi Duncan, On 10/14/11 03:56 PM, Duncan Sands wrote: > Hi Karel, > >> > const unsigned* >> > ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) >> const { >> > + bool ghcCall = false; >> > + >> > + if (MF) { >> > + const Function *F = MF->getFunction(); >> > + ghcCall = (F ? F->getCallingConv() == CallingConv::GHC : false); >> > + } >> >&...

Dear there, I was wondering how to preserve registers (caller saved) across calls. I implemented getCalleeSavedRegs and getCallPreservedMask. But the non-callee-saved registers are still not saved by caller. I want to spill these registers in use on stack right before the call. From my understanding, the register allocator in llvm will do the spill and restoring automatically? Is there anything I was supposed t...

Hi Karel, >>> > const unsigned* >>> > ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) >>> const { >>> > + bool ghcCall = false; >>> > + >>> > + if (MF) { >>> > + const Function *F = MF->getFunction(); >>> > + ghcCall = (F ? F->getCallingConv() == CallingConv::GHC : false); >>...

Hi Duncan, > const unsigned* > ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { > + bool ghcCall = false; > + > + if (MF) { > + const Function *F = MF->getFunction(); > + ghcCall = (F ? F->getCallingConv() == CallingConv::GHC : false); > + } > This bit looks dubious. Why do you need to do it? Wh...

Hi Duncan, Karel, On 14 October 2011 08:22, Duncan Sands <baldrick at free.fr> wrote: > Hi Karel, > >>>> > const unsigned* >>>> > ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) >>>> const { >>>> > + bool ghcCall = false; >>>> > + >>>> > + if (MF) { >>>> > + const Function *F = MF->getFunction(); >>>> > + ghcCall = (F ? F->getCallingConv() == CallingConv...

Not sure who owns this bit of code, so sending this to the general list. It looks like there may be an unintentional fall through happening in the X86RegisterInfo::getCallPreservedMask function. http://llvm.org/docs/doxygen/html/X86RegisterInfo_8cpp_source.html case CallingConv::Intel_OCL_BI

Hi Karel, > > const unsigned* > > ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { > > + bool ghcCall = false; > > + > > + if (MF) { > > + const Function *F = MF->getFunction(); > > + ghcCall = (F ? F->getCallingConv() == CallingConv::GHC : false); > > + } > > > This bit looks dubious. W...

...> > Yes, unfortunately the list of call-clobbered registers is fixed at > the moment, so coldcc is mostly ignored by the backend. > > Patches welcome. What would be needed there? I actually tried a quick hack and simply changed the registers included in the list in X86RegisterInfo::getCalleeSavedRegs, so some xmm regs were included (similar to what was done for win64). But the result wasn't what I expected - the callee now indeed saved/restored all the xmm regs I added, however the calling code did not change at all... > >> So is there any optimization option I'm missing whi...

Hello, I would like to know if there's a way of setting the callee-saved register list inside getCalleeSavedRegs() to make the PEI pass save/restore only one half of a register pair if the other half is not being used, instead of saving the whole pair. Here is an example of what I try to explain to make things more clear: Suppose this situation where we have a register file of 8bit regs, and that you can fo...

...call-site. > > I see, thanks for explaining.  But then can the MachineFunction really be > null? Yes. For the X86 equiv of this code (X86RegisterInfo.cpp) the 'if (MF)' lines already existed before my patch. So I assume the existing code was correct. A quick grep for calls to 'getCalleeSavedRegs' also shows some calls in some optimisation passes that don't pass in an argument and the default argument is null. Hope this all helps. Is there someone who 'owns' this section of the code that we can rope into the discussion though as I'm not that qualified. Cheers, David

...ly the list of call-clobbered registers is fixed at >> the moment, so coldcc is mostly ignored by the backend. >> >> Patches welcome. > What would be needed there? I actually tried a quick hack and simply > changed the registers included in the list in > X86RegisterInfo::getCalleeSavedRegs, so some xmm regs were included > (similar to what was done for win64). But the result wasn't what I > expected - the callee now indeed saved/restored all the xmm regs I > added, however the calling code did not change at all... Look in X86InstrControl.td. The call instructions are a...

I think the easiest thing for you to do is to define a separate CALL instruction with a different set of Defs. This instruction should only be selected when the predicate isMacho is true. Also update PPCRegisterInfo.cpp getCalleeSavedRegs() to return a different list when subtarget->isMachoABI() is true. Evan On Feb 14, 2007, at 7:19 AM, Nicolas Geoffray wrote: > Hi Chris, > > Chris Lattner wrote: >>> 2) Line 369 of PPCInstrInfo.td, we declare the non-callee saved >>> registers. >>> Ho...

Hi Borja, On Jul 10, 2012, at 6:26 PM, Borja Ferrer wrote: > Hello, > > I would like to know if there's a way of setting the callee-saved register list inside getCalleeSavedRegs() to make the PEI pass save/restore only one half of a register pair if the other half is not being used, instead of saving the whole pair. Here is an example of what I try to explain to make things more clear: > > Suppose this situation where we have a register file of 8bit regs, and that...

...g convention on x86-32 needs to handle just 4 parameters, passing them in %ebx, %ebp, %esi, %edi. These are all callee saved registers. To implement the custom calling convention I change llvm in two places: 1) X86CallingConv.td : Add new calling convention. 2) X86RegisterInfo.cpp : Modify 'getCalleeSavedRegs' to remove the above registers from the callee saved registers. This works fine mostly. On Linux, the generated code passes the GHC testsuite. On Mac however the GHC testsuite fails on any code which uses the ffi (which is implemented by libffi [http://sourceware.org/libffi/]). Programs w...

This is a follow up on a conversation some of us had at the hacker lab -- I noticed that sometimes I will get notified that a deopt value lives in a register that is not callee-save (caller-save I guess, but is there another term for this that is less similar to callee-save?). This surprised me quite a bit since those registers immediately got clobbered by the call inside the patchpoint, so we

Hi Chris, Chris Lattner wrote: >> 2) Line 369 of PPCInstrInfo.td, we declare the non-callee saved registers. >> However, Linux and Darwin do not have the same set >> of non-callee saved registers. I don't know how to make the if(isDarwin) test >> in here >> > > Take a look at ARM/ARMRegisterInfo.td for an example of this I tried to define Defs just

...convention support for X86-64/ Win64. It doesn't correctly save and restore the XMM registers in the function prolog/epilog. (The problem only exists on Win64, since Linux and Mac OS use calling convention in which these registers are volatile and not callee-saved.) X86RegisterInfo::getCalleeSavedRegs() when called for a Win64 target does return an array of registers which includes X86::XMM6 through X86:XMM15. However, the prolog/epilog code does not seem to be able handle saving these registers correctly. Firstly, in PEI::CalculateCalleeSavedRegisters() in CodeGen/ PrologEpilogInserte...

...see, thanks for explaining.  But then can the MachineFunction really be >> null? > > Yes. For the X86 equiv of this code (X86RegisterInfo.cpp) the 'if > (MF)' lines already existed before my patch. So I assume the existing > code was correct. A quick grep for calls to 'getCalleeSavedRegs' also > shows some calls in some optimisation passes that don't pass in an > argument and the default argument is null. > > Hope this all helps. Is there someone who 'owns' this section of the > code that we can rope into the discussion though as I'm not that &gt...

...rgets in the tree should consider converting as well. The conversion is quite simple, copy from ARM and X86 as needed: - Move callee saved register lists to *CallingConv.td by defining CalleeSavedRegs instances. TableGen will produce *_SaveList and *_RegMask arrays. Use them to implement the TRI::getCalleeSavedRegs() and TRI::getCallPreservedRegMask() hooks. - Fix target-dependent code to understand regmask operands. The target-independent passes have already been fixed. - Update *TargetLowering::LowerCall() to add a RegisterMaskSDNode operand to call SDNodes. - Update your fast isel call emission to do t...