Displaying 3 results from an estimated 3 matches for "getarmindexedaddressparts".
2013 Apr 08
1
[LLVMdev] Is r174746 broken on ARM?
...; CNV += OV;
> else
> CNV -= OV;
>
> perhaps something here is not quite right.
I suspect that the first snippet (where OV is inverted) is wrong because
ARM implementation of getPreIndexedAddressParts inverts Offset for
pre-decrement case, both for ARM and Thumb2, in getARMIndexedAddressParts
and getT2IndexedAddressParts, respectively, in a calls to:
Offset = DAG.getConstant(-RHSC, RHS->getValueType(0));
^^^^^
here!
So you don't need to invert it one more time in DAGCombiner::CombineToPreIndexedLoadStore.
Dmitry
2013 Apr 04
0
[LLVMdev] Is r174746 broken on ARM?
----- Original Message -----
> From: "Dmitry Antipov" <antipov at dev.rtsoft.ru>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "Renato Golin" <renato.golin at linaro.org>, llvmdev at cs.uiuc.edu
> Sent: Thursday, April 4, 2013 3:22:05 AM
> Subject: Is r174746 broken on ARM?
>
> Hello Hal,
>
> I have a strong suspicion
2013 Apr 04
2
[LLVMdev] Is r174746 broken on ARM?
Hello Hal,
I have a strong suspicion that your constant folding optimization
introduced at r174746 is broken on ARM. There is a bug about it:
http://llvm.org/bugs/show_bug.cgi?id=15581
There is no such issue with 3.2, and reverting r174746 on top of
r178740 also fixes the problem. I'm trying to fix it myself, but
still have no good ideas; so it would be great to have an advice
from you.