Displaying 3 results from an estimated 3 matches for "genericdomain".
2010 Mar 25
1
[LLVMdev] TSFlagsFields and TSFlagsShifts obsolete?
I think we can get rid of the TSFlagsFields and TSFlagsShifts hack in the InstrInfo TableGen class now.
This seems to work just fine:
class Instruction {
bits<32> TSFlags;
}
class Domain<bits<2> val> {
bits<2> Value = val;
}
def GenericDomain : Domain<0>;
def SSEPackedInt : Domain<1>;
def SSEPackedSingle : Domain<2>;
def SSEPackedDouble : Domain<3>;
class X86Instr<bits<8> opcod> : Instruction {
Domain ExeDomain = GenericDomain;
let TSFlags{0-7} = opcod;
let TSFlags{22-23} = ExeDomain.Value...
2015 Jul 10
0
[LLVMdev] TSFlags
On 7/10/2015 10:23 AM, Sky Flyer wrote:
> Many thanks for your prompt reply.
>
> I mean, imagine you have 3 bits for condition flags in your instruction
> (e.g. overflow, zero, carry set, ...) for conditional executions AND
> there is no direct access to the Status Register, is it even possible to
> implement such scenario?
>
There doesn't have to be any explicit status
2015 Jul 10
3
[LLVMdev] TSFlags
Many thanks for your prompt reply.
I mean, imagine you have 3 bits for condition flags in your instruction
(e.g. overflow, zero, carry set, ...) for conditional executions AND there
is no direct access to the Status Register, is it even possible to
implement such scenario?
On Fri, Jul 10, 2015 at 4:54 PM, Krzysztof Parzyszek <
kparzysz at codeaurora.org> wrote:
> On 7/10/2015 9:32