search for: gen'ed

Displaying 13 results from an estimated 13 matches for "gen'ed".

2009 Jun 04
1
[LLVMdev] endian issue of llvm-gcc and llvm backend
...nc i64 %sroa.store.elt to i32 ; <i32> [#uses=3] %2 = sub i32 32, %b ; <i32> [#uses=3] %3 = icmp sgt i32 %2, 0 ; <i1> [#uses=1] br i1 %3, label %bb3, label %bb2 ...... ============================================== >From the generated IR, we could see that llvm IR is endian dependent and it know how to get the low 32 bits of a 64 bits parameter. While generate asm code from these 2 different IR, I got the same asm code. The following is the asm code which are mips like: (NOTE: $rx indicates a 32 bits register x, #x indic...
2015 Mar 09
4
[LLVMdev] TargetParser - Always build all table-gen files?
...rget parser that we discussed last year, and I have some questions. http://lists.cs.uiuc.edu/pipermail/cfe-dev/2014-August/038699.html There is no way I can create a target-independent parser in lib/Target without re-encoding all the information about the targets that we already have in the table-gen files on all targets' directories. Doing that would be folly. But building all targets by default goes against the current thinking, which I quite welcome and think we should not break it. We need to find a common ground. My idea is to build all table-gen files on all targets, but not build a...
2016 Jul 08
2
IPRA, interprocedural register allocation, question
...Preserve_most > Preserve_all > They are not available in the 3.6.2 that I am currently using, but I hope they exist in 3.8 > > These should provide enough info to solve my problem, > at the MC level calls to functions with these attributes > with be code-gened through different “calling conventions”, > and CALL instructions to them should have different register USE and DEF info, > > This CALL instruction register USE and DEF info should already be useful > to the intra-procedural register allocator (allowing values live across these &g...
2009 Jun 05
0
[LLVMdev] endian issue of llvm-gcc and llvm backend
...non-arm backend, and I used a target which likes mips has both big and little endianness. And I have ported llvm-gcc to this platform along with llvm backend. The issue is about IR endianness and how backend deal with the data and instructions in different endian, since I discovered 2 different IR generates the same asm code by llc for different endian target. > Message: 27 > Date: Thu, 4 Jun 2009 05:22:07 -0700 (PDT) > From: Samuel Crow <samuraileumas at yahoo.com> > Subject: Re: [LLVMdev] endian issue of llvm-gcc and llvm backend > To: LLVM Developers Mailing List <ll...
2015 Jun 28
5
[LLVMdev] Intrinsic parameters verification
Hi, I have target specific intrinsics (X86 in my case) with special constant parameters. Rounding mode constant, or scale value in gather/scatter. The scale, for example, may be 0, 1, 2, 4, or 8 only. How do I verify the values on IR level ? I'm looking at Verifier::visitIntrinsicFunctionCall() but I see only common intrinsics here, not target specific. Thank you. - Elena
2016 Jul 06
3
IPRA, interprocedural register allocation, question
..." (result) : "g" (a), "g" (b) : "ecx" ,"r13", "r15" ); return result ; } IPRA calculates and propagates correct regmask in which it marks CH, CL, ECX .. clobbered and R13, R15 is not marked clobbered as it is callee saved and LLVM code generators also insert spill/restores code for them. Is there any way in your IPRA interprocedural register allocation project > that > The user can supply this information for external functions ? By external word do you here mean function defined in other module than being used? In that case...
2016 Jul 08
2
IPRA, interprocedural register allocation, question
...Preserve_all > > They are not available in the 3.6.2 that I am currently using, but I hope > they exist in 3.8 > > > > These should provide enough info to solve my problem, > > at the MC level calls to functions with these attributes > > with be code-gened through different “calling conventions”, > > and CALL instructions to them should have different register USE and DEF > info, > > > Yes I believe that preserve_most or preserve_all should help you even with out IPRA. But just to note IPRA can even help further for example on X...
2016 Jul 09
3
IPRA, interprocedural register allocation, question
...butes in the clang docs Preserve_most Preserve_all They are not available in the 3.6.2 that I am currently using, but I hope they exist in 3.8 These should provide enough info to solve my problem, at the MC level calls to functions with these attributes with be code-gened through different “calling conventions”, and CALL instructions to them should have different register USE and DEF info, Yes I believe that preserve_most or preserve_all should help you even with out IPRA. But just to note IPRA can even help further for example on X86 preserve_most cc will not...
2018 May 02
0
Generating function definition for function that's only called during unwinding
...eck out how the UseList on Value (and its child BasicBlock) work. On Tue, May 1, 2018 at 8:34 PM, Keith Wyss <wyssman at gmail.com> wrote: > Hi, > > I'm trying to understand how clang keeps track of which declarations are > called within a translation unit and decides to codegen their definitions. > > DeclBase.h has a markUsed to keep track of ODR use, and I think that the > decl can be found from the symbol table via ASTContext.h (for example > looking up a template via GetQualifiedTemplateName -> getAsTemplateDecl -> > setIsUsed ). This is just a res...
2016 Jul 12
2
IPRA, interprocedural register allocation, question
...butes in the clang docs Preserve_most Preserve_all They are not available in the 3.6.2 that I am currently using, but I hope they exist in 3.8 These should provide enough info to solve my problem, at the MC level calls to functions with these attributes with be code-gened through different “calling conventions”, and CALL instructions to them should have different register USE and DEF info, Yes I believe that preserve_most or preserve_all should help you even with out IPRA. But just to note IPRA can even help further for example on X86 preserve_most cc will not...
2018 May 02
3
Generating function definition for function that's only called during unwinding
Hi, I'm trying to understand how clang keeps track of which declarations are called within a translation unit and decides to codegen their definitions. DeclBase.h has a markUsed to keep track of ODR use, and I think that the decl can be found from the symbol table via ASTContext.h (for example looking up a template via GetQualifiedTemplateName -> getAsTemplateDecl -> setIsUsed ). This is just a result of fumbling around i...
2016 Jul 12
3
IPRA, interprocedural register allocation, question
...butes in the clang docs Preserve_most Preserve_all They are not available in the 3.6.2 that I am currently using, but I hope they exist in 3.8 These should provide enough info to solve my problem, at the MC level calls to functions with these attributes with be code-gened through different “calling conventions”, and CALL instructions to them should have different register USE and DEF info, Yes I believe that preserve_most or preserve_all should help you even with out IPRA. But just to note IPRA can even help further for example on X86 preserve_most cc will not...
2016 Jul 12
3
IPRA, interprocedural register allocation, question
Mehdi, I am looking for an understanding of 1) IPRA in general, 2) IPRA in LLVM. Whether I want to use LTO or not is a separate issue. 1) I currently believe it is a true statement that: If all external functions are known to not call back into the “whole-program” Being compiled, then IPRA is free to do anything at all t...