Displaying 20 results from an estimated 69 matches for "gdt_entry_tss".
2007 Apr 18
0
[PATCH 1/12] gdt-tss-redundant
When reviewing GDT updates, I found the code:
set_tss_desc(cpu,t); /* This just modifies memory; ... */
per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;
This second line is unnecessary, since set_tss_desc() has already cleared
the busy bit.
Commented disassembly, line 1:
c028b8bd: 8b 0c 86 mov (%esi,%eax,4),%ecx
c028b8c0: 01 cb add %ecx,%ebx
c028b8c2: 8d 0c 39...
2007 Apr 18
0
[PATCH 1/12] gdt-tss-redundant
When reviewing GDT updates, I found the code:
set_tss_desc(cpu,t); /* This just modifies memory; ... */
per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;
This second line is unnecessary, since set_tss_desc() has already cleared
the busy bit.
Commented disassembly, line 1:
c028b8bd: 8b 0c 86 mov (%esi,%eax,4),%ecx
c028b8c0: 01 cb add %ecx,%ebx
c028b8c2: 8d 0c 39...
2007 Apr 18
0
[PATCH 11/12] subarch-desc
.../include/asm-i386/desc.h 2005-08-08 17:31:59.000000000 -0700
+++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:36:35.000000000 -0700
@@ -33,19 +33,6 @@
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
-#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-
-#define load_gdt(dtr) asm volatile("lgdtl %0"::"m" (*dtr))
-#define load_idt(dtr) asm volatile("lidtl %0"::"m" (*dtr))
-#define load_tr(tr) asm volatile("...
2007 Apr 18
0
[PATCH 11/12] subarch-desc
.../include/asm-i386/desc.h 2005-08-08 17:31:59.000000000 -0700
+++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:36:35.000000000 -0700
@@ -33,19 +33,6 @@
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
-#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-
-#define load_gdt(dtr) asm volatile("lgdtl %0"::"m" (*dtr))
-#define load_idt(dtr) asm volatile("lidtl %0"::"m" (*dtr))
-#define load_tr(tr) asm volatile("...
2007 Apr 18
3
[PATCH] abstract out bits of ldt.c
Chris Wright wrote:
>* Zachary Amsden (zach@vmware.com) wrote:
>
>
>>Does Xen assume page aligned descriptor tables? I assume from this
>>
>>
>
>Yes.
>
>
>
>>patch and snippets I have gathered from others, that is a yes, and other
>>things here imply that DT pages are not shadowed. If so, Xen itself
>>must have live segments
2007 Apr 18
3
[PATCH] abstract out bits of ldt.c
Chris Wright wrote:
>* Zachary Amsden (zach@vmware.com) wrote:
>
>
>>Does Xen assume page aligned descriptor tables? I assume from this
>>
>>
>
>Yes.
>
>
>
>>patch and snippets I have gathered from others, that is a yes, and other
>>things here imply that DT pages are not shadowed. If so, Xen itself
>>must have live segments
2007 Apr 18
3
[RFC, PATCH 10/24] i386 Vmi descriptor changes
...800
+++ linux-2.6.16-rc5/include/asm-i386/desc.h 2006-03-10 13:03:34.000000000 -0800
@@ -33,50 +33,66 @@ static inline struct desc_struct *get_cp
return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address;
}
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-
-#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
-#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
-#define load_tr(tr) _...
2007 Apr 18
3
[RFC, PATCH 10/24] i386 Vmi descriptor changes
...800
+++ linux-2.6.16-rc5/include/asm-i386/desc.h 2006-03-10 13:03:34.000000000 -0800
@@ -33,50 +33,66 @@ static inline struct desc_struct *get_cp
return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address;
}
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-
-#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
-#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
-#define load_tr(tr) _...
2007 Apr 18
0
[PATCH 5/12] desc-cleanup
...asm-i386/desc.h 2005-08-08 17:10:49.000000000 -0700
+++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:15:46.000000000 -0700
@@ -31,18 +31,18 @@
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
+#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
+#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-#define...
2007 Apr 18
0
[PATCH 5/12] desc-cleanup
...asm-i386/desc.h 2005-08-08 17:10:49.000000000 -0700
+++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:15:46.000000000 -0700
@@ -31,18 +31,18 @@
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
+#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
+#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-#define...
2020 Apr 28
0
[PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs
...head early_load_tss(void)
+{
+ struct desc_struct *gdt = (struct desc_struct *)boot_gdt;
+ struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
+ tss_desc tss_desc;
+
+ set_tssldt_descriptor(&tss_desc, (unsigned long)tss, DESC_TSS,
+ __KERNEL_TSS_LIMIT);
+ native_write_gdt_entry(gdt, GDT_ENTRY_TSS, &tss_desc, DESC_TSS);
+
+ asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
+}
+
void __head early_idt_setup(unsigned long physbase)
{
gate_desc *idt = fixup_pointer(idt_table, physbase);
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 4d84a0c72e3...
2007 Apr 18
1
[PATCH 4/14] i386 / Clean up asm and volatile keywords in desc
...default/mach_desc.h 2005-08-09 18:38:14.000000000 -0700
+++ linux-2.6.13/include/asm-i386/mach-default/mach_desc.h 2005-08-10 20:42:03.000000000 -0700
@@ -24,30 +24,30 @@
#ifndef __MACH_DESC_H
#define __MACH_DESC_H
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
+#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
+#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-#define...
2007 Apr 18
1
[PATCH 4/14] i386 / Clean up asm and volatile keywords in desc
...default/mach_desc.h 2005-08-09 18:38:14.000000000 -0700
+++ linux-2.6.13/include/asm-i386/mach-default/mach_desc.h 2005-08-10 20:42:03.000000000 -0700
@@ -24,30 +24,30 @@
#ifndef __MACH_DESC_H
#define __MACH_DESC_H
-#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
+#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
+#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
-#define...
2007 Dec 06
51
[PATCH 0/19] desc_struct integration
Hi,
this is a series of patches that unify the struct desc_struct and friends
across x86_64 and i386. As usual, it provides paravirt capabilities as a
side-effect for x86_64.
I consider the main goal, namely, of unifying the desc_struct, an ongoing
effort, being this the beginning. A lot of old code has to be touched to
accomplish that.
I don't consider this patch ready for inclusion.
2007 Dec 06
51
[PATCH 0/19] desc_struct integration
Hi,
this is a series of patches that unify the struct desc_struct and friends
across x86_64 and i386. As usual, it provides paravirt capabilities as a
side-effect for x86_64.
I consider the main goal, namely, of unifying the desc_struct, an ongoing
effort, being this the beginning. A lot of old code has to be touched to
accomplish that.
I don't consider this patch ready for inclusion.
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
...============================================================
--- clean-start.orig/include/asm-x86_64/desc.h
+++ clean-start/include/asm-x86_64/desc.h
@@ -16,9 +16,8 @@
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
-#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
-#define clear_LDT() asm volatile("lldt %w0"::"r" (0))
+/* the cpu gdt accessor */
+#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address)
/*
* This is the l...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
...============================================================
--- clean-start.orig/include/asm-x86_64/desc.h
+++ clean-start/include/asm-x86_64/desc.h
@@ -16,9 +16,8 @@
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
-#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8))
-#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
-#define clear_LDT() asm volatile("lldt %w0"::"r" (0))
+/* the cpu gdt accessor */
+#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address)
/*
* This is the l...
2020 Aug 24
0
[PATCH v6 70/76] x86/smpboot: Setup TSS for starting AP
...l_gs, physbase);
__wrmsr(MSR_GS_BASE, (u32)gsbase, (u32)(gsbase >> 32));
}
+
+void __head early_load_tss(void)
+{
+ struct desc_struct *gdt = (struct desc_struct *)early_gdt_descr.address;
+ tss_desc tss;
+
+ /* Load TSS only if entry in GDT is marked present */
+ memcpy(&tss, &gdt[GDT_ENTRY_TSS], sizeof(tss_desc));
+ if (tss.p)
+ asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
+}
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 12bf6f11fd83..8d5bf7c568a4 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -220,6 +220,11 @@...
2007 Apr 18
3
[PATCH 1/4] x86 paravirt_ops: create no_paravirt.h for native ops
(Andrew, please sit these in the -mm tree for cooking)
Create a paravirt.h header for (almost) all the critical operations
which need to be replaced with hypervisor calls.
For the moment, this simply includes no_paravirt.h, where all the
native implementations now live.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Zachary Amsden <zach@vmware.com>
2007 Apr 18
3
[PATCH 1/4] x86 paravirt_ops: create no_paravirt.h for native ops
(Andrew, please sit these in the -mm tree for cooking)
Create a paravirt.h header for (almost) all the critical operations
which need to be replaced with hypervisor calls.
For the moment, this simply includes no_paravirt.h, where all the
native implementations now live.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Zachary Amsden <zach@vmware.com>