search for: gcra

...rtions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index 9d70ec3c9c..e4f38c8e46 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -1146,6 +1146,9 @@ GCRA::GCRA(Function *fn, SpillCodeInserter& spill) : regs(fn->getProgram()->getTarget()), spill(spill) { + nodeCount = 0; + nodes = NULL; + prog = func->getProgram(); // initialize relative degrees array - i takes away from j -- 2.14.0

...letion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index 361918a161..a70a54f6b8 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -1144,7 +1144,9 @@ GCRA::RIG_Node::addRegPreference(RIG_Node *node) GCRA::GCRA(Function *fn, SpillCodeInserter& spill) : func(fn), regs(fn->getProgram()->getTarget()), - spill(spill) + spill(spill), + nodeCount(0), + nodes(NULL) { prog = func->getProgram(); -- 2.15.1

Hello , I have written a very simple MachineFunction Pass that currently does nothing. It compiles fine but when I try to load it with llc it give me following error: llc -optimize-regalloc=0 -load lib/GCRA.dylib -regalloc=gc test/fibo.bc Pass 'Bundle Machine CFG Edges' is not initialized. Verify if there is a pass dependency cycle. What is going wrong here ? Here is my very simple code: //===-- GCRA.cpp - Regsiter Allocator --------------------------------===// // // // //===-------------...

...t a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > index 9d70ec3c9c..e4f38c8e46 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp > @@ -1146,6 +1146,9 @@ GCRA::GCRA(Function *fn, SpillCodeInserter& spill) : > regs(fn->getProgram()->getTarget()), > spill(spill) > { > + nodeCount = 0; > + nodes = NULL; > + > prog = func->getProgram(); > > // initialize relative degrees array - i takes away from...

This lets us spill more values and compile a big shader for Civilization 6. Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index b33d7b4010..f29c8a1a95

I tried using this flag and it gave me errors on code that otherwise assembles and runs just fine (using the version of Gcra.cpp that Lang wrote). So I'm wondering if I should really be using the flag? I'm using it like this: llc -verify-machineinstrs -load Debug/lib/P4.so -regalloc=gc xxx.bc Susan On 11/15/2012 01:13 PM, Jakob Stoklund Olesen wrote: > > On Nov 15, 2012, at 7:53 AM, Susan Horwitz&lt...

...3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index cd8c42c..f1ffcba 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -1129,9 +1129,11 @@ GCRA::doCoalesce(ArrayList& insns, unsigned int mask) void GCRA::RIG_Node::addInterference(RIG_Node *node) { - this->degree += relDegree[node->colors][colors]; - node->degree += relDegree[colors][node->colors]; - + // don't add degree for physregs since they won't go thr...

...drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -627,6 +627,7 @@ RegAlloc::BuildIntervalsPass::visit(BasicBlock *bb) #define JOIN_MASK_UNION (1 << 1) #define JOIN_MASK_MOV (1 << 2) #define JOIN_MASK_TEX (1 << 3) +#define JOIN_MASK_MAD (1 << 4) class GCRA { @@ -851,7 +852,7 @@ GCRA::coalesce(ArrayList& insns) case 0x80: case 0x90: case 0xa0: - ret = doCoalesce(insns, JOIN_MASK_UNION | JOIN_MASK_TEX); + ret = doCoalesce(insns, JOIN_MASK_UNION | JOIN_MASK_TEX | JOIN_MASK_MAD); break; case 0xc0: case 0xd0: @@ -...

Hi Susan, Jakob pointed out to me that the Gcra.cpp allocator doesn't record basic-block live-ins, which are used by the verifier to check correctness. You can record which variables are live into a basic block with MachineBasicBlock::addLiveIn(unsigned physReg). I don't know the verifier well, but if it's using other built in infra...

...tack-slot. The stack slot always has the same width as vreg (which is the right behavior), but for operands with subreg indexes, 'preg''s class will be different from 'vreg', in which case you get the mismatched loads/stores you were seeing. I've attached an updated copy of Gcra.cpp that doesn't exhibit this bug. In the new version the loads and stores always reference 'preg', which is always a physical register of the same class as 'vreg'. The update adds a new variable, preg_op, to hold the subregister of preg that will be used for the operand current...

Hi Jakob, Yes. I have references. For example, from the top of my head I would name the following papers: 1)  A Generalized Algorithm for Graph-Coloring Register Allocation by Michael D. Smith, Norman Ramsey and Glenn Holloway      http://www.cs.tufts.edu/~nr/pubs/gcra-abstract.html 2) Register allocation by puzzle solving by Fernando Magno Quintão Pereira, Jens Palsberg      http://llvm.org/pubs/2008-06-PLDI-PuzzleSolving.pdf I think I've seen a few more papers on this topic, but cannot remember them at the moment. If I find more papers in my collection I&...

...ample. Fixed version attached. - Lang. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121115/35fae7e7/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: Gcra.cpp Type: text/x-c++src Size: 9561 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121115/35fae7e7/attachment.cpp>

On Sep 27, 2011, at 12:11 AM, Leo Romanoff wrote: > Quite some of these register allocation proposals are also able to handle overlapping register classes. That's interesting. Do you have any references? /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110927/e4b1f13d/attachment.html>

...he assembler errors, but it doesn't seem to produce correct assembly. I created a slightly modified version that, for each instruction that includes a vreg, adds a check that the preg selected is not already in that instruction. I've attached that version. I think that this version of Gcra.cpp should produce correct assembler, since it's allocating one stackframe for each vreg and always loading/storing from/to that stackframe. I've attached a simpler version of the test input (now called bug.c) plus the .bc file and the .s file produced by the new code. When I assemble...

MAD IMM has a very specific SDST == SSRC2 requirement, so don't emit Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 18 ++++++++++++------ .../drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp

...ing in > to this now. > > - Lang. > > > On Mon, Nov 5, 2012 at 2:58 PM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > >> Hi Lang, >> >> I looked more into one of the problems I'm now having, and I've attached >> 3 files: >> >> Gcra.cpp is like your version except that for two specific vregs it uses >> hard-coded pregs instead of the first in the corresponding class. >> >> bug1.c is an input that causes the failed assertion for me. If I use the >> non-debug version of LLVM-3.1 I instead get assembler e...

...On Mon, Nov 5, 2012 at 2:58 PM, Susan Horwitz <horwitz at cs.wisc.edu > <mailto:horwitz at cs.wisc.edu>> wrote: > > Hi Lang, > > I looked more into one of the problems I'm now having, and > I've attached 3 files: > > Gcra.cpp is like your version except that for two specific > vregs it uses hard-coded pregs instead of the first in the > corresponding class. > > bug1.c is an input that causes the failed assertion for me. > If I use the non-debug version of LLVM-3.1 I in...

Hi Lang, I looked more into one of the problems I'm now having, and I've attached 3 files: Gcra.cpp is like your version except that for two specific vregs it uses hard-coded pregs instead of the first in the corresponding class. bug1.c is an input that causes the failed assertion for me. If I use the non-debug version of LLVM-3.1 I instead get assembler errors like this: Error: can'...

...her unusable for most architectures. One idea that can be used for improving handling of irregular architectures is described in the "A Generalized Algorithm for Graph-Coloring Register Allocation" by Michael D. Smith, Norman Ramsey and Glenn Holloway: http://www.eecs.harvard.edu/~nr/pubs/gcra-abstract.html There exists also an implementation of the algorithm described in the paper for the SUIF compiler suite. I was planning to port it to LLVM, but a bit later. At the moment I'm working on the implementation of a linear scan register allocator based on the Wimmer's paper &quot...

...ead> %EAX will be added to usedPregSet when the instruction is encountered, but %vreg13 is a different class (64bit registers), so none of its candidates will conflict. In addition to checking membership of usedPregSet, you need to check all aliases of the elements of usedPregSet. The attached Gcra includes code for this. It also moves the erasure of the subreg index out of the inner loop so that if a vreg appears multiple times in an instruction all subreg indexes will be cleared. - Lang. On Tue, Nov 13, 2012 at 2:58 PM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > Lang - &gt...