Displaying 20 results from an estimated 37 matches for "galoi".
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2012 Oct 19
1
OpenSSH and Galois/Counter mode i.e. GCM
Hello,
Are there any known efforts to implement RFC 5647 i.e. AES Galois
Counter Mode for the Secure Shell Transport Layer Protocol for OpenSSH?
If not, would OpenSSH project be interested in such feature?
Thanks.
2015 Sep 24
0
Configure NUT slaves for D-Link 320 ShareCenter NUT master
...0 ShareCenter", a SOHO 2-bay NAS. I set up the UPS in "Master Mode". Unfortunately it doesn't supply any kind of useful info in the web interface, so I had to connect via ?nc' to port 3493 to get the proper UPS name.
I manage to to issue a successful ?upsc? command:
root at galois:~# upsc megatec at 192.168.3.6
battery.charge: 100
battery.voltage: 13.70
battery.voltage.high: 13.00
battery.voltage.low: 10.40
battery.voltage.nominal: 12.0
device.type: ups
driver.name: blazer_usb
driver.parameter.pollinterval: 2
driver.parameter.port: auto
driver.version: 2.6.4
driver.version....
2015 Sep 24
2
Configure NUT slaves for D-Link 320 ShareCenter NUT master
...0 ShareCenter", a SOHO 2-bay NAS. I set up the UPS in "Master Mode". Unfortunately it doesn't supply any kind of useful info in the web interface, so I had to connect via ?nc' to port 3493 to get the proper UPS name.
I manage to to issue a successful ?upsc? command:
root at galois:~# upsc megatec at 192.168.3.6
battery.charge: 100
battery.voltage: 13.70
battery.voltage.high: 13.00
battery.voltage.low: 10.40
battery.voltage.nominal: 12.0
device.type: ups
driver.name: blazer_usb
driver.parameter.pollinterval: 2
driver.parameter.port: auto
driver.version: 2.6.4
driver.version....
2020 May 18
2
Use Galois field New Instructions (GFNI) to combine affine instructions
On 5/18/20 8:24 PM, Craig Topper wrote:
> I can tell you that your avx512 issue is that v64i8 gfni instructions also
> require avx512bw to be enabled to make v64i8 a supported type. The C
> intrinsics handling in the front end know this rule. But since you
> generated your own intrinsics you bypassed that.
Indeed that's the issue... I was stick with what Intel announces here
2010 Nov 30
0
ANN: HaLVM 1.0: the Haskell Lightweight Virtual Machine
Galois, Inc. is pleased to announce the immediate release of the Haskell
Lightweight Virtual Machine (or HaLVM), version 1.0. The HaLVM is a port
of the GHC runtime system to the Xen hypervisor, allowing programmers to
create Haskell programs that run directly on Xen''s "bare metal."...
2015 Sep 26
0
Configure NUT slaves for D-Link 320 ShareCenter NUT master
...n master
[client]
password = 123
upsmon slave
I bet these are the defaults for every DNS-3xx series out there. I wonder why they did not put the info on the manual. I?m posting this for the ?future generations?.. In case anyone else needs to enable this. Now ?upsmon? works fine:
Sep 26 10:28:42 galois upsmon[10102]: Signal 15: exiting
Sep 26 10:28:42 galois upsmon[10100]: upsmon parent: read
Sep 26 10:28:42 galois upsmon[14837]: Startup successful
Sep 26 10:28:42 euclid upsd[2372]: User client at 192.168.3.4 logged into UPS [megatec]
Best Regards,
[1] https://nas-tweaks.net/371/hdd-installa...
2011 Jan 15
2
[LLVMdev] Fw: LLVM GC
Forgot to CC the list.
----- Forwarded Message ----
> From: Samuel Crow <samuraileumas at yahoo.com>
> To: Trevor Elliott <trevor at galois.com>
> Sent: Fri, January 14, 2011 7:33:15 PM
> Subject: Re: [LLVMdev] LLVM GC
>
> Hi Trevor,
>
> Are you linking with LibStdC++ or LibC++? That is a requirement for running
> code that has been compiled from C++ to bitcode.
>
> Hope this helps,
>
> --Sa...
2011 Jan 17
0
[LLVMdev] Fw: LLVM GC
...tting processed by
the "shadow-stack" strategy?
Thanks!
--trevor
On 01/14/2011 05:33 PM, Samuel Crow wrote:
> Forgot to CC the list.
>
>
> ----- Forwarded Message ----
>> From: Samuel Crow <samuraileumas at yahoo.com>
>> To: Trevor Elliott <trevor at galois.com>
>> Sent: Fri, January 14, 2011 7:33:15 PM
>> Subject: Re: [LLVMdev] LLVM GC
>>
>> Hi Trevor,
>>
>> Are you linking with LibStdC++ or LibC++? That is a requirement for running
>> code that has been compiled from C++ to bitcode.
>>
>>...
2017 Oct 06
2
rsync does hours of "fake-work" after failure
...uot;fakes" the rest of the
process :-) And because it took some hours, this was a real bad
surprise at the end.
Below is the output of a little test that can easily be reprocuded.
Is this a known bug? I couldn't find something similar in bugzilla
or the mailinglist archives.
cu,
Frank
galois [15:42] test 4940) ~/tmp/rsync-HEAD-20170123-0003GMT/rsync -avP . /media/disk/test/
sending incremental file list
created directory /media/disk/test
./
a
0 100% 0.00kB/s 0:00:00 (xfr#1, to-chk=6/8)
test1.dd
4,533,766,144 100% 110.55MB/s 0:00:39 (xfr#2, to-chk=5/8)
u...
2020 May 18
2
Use Galois field New Instructions (GFNI) to combine affine instructions
Hello everyone,
On the last couple of days, I have been experimenting with teaching LLVM how to combine a
set of affine instructions into an instruction that uses the GFNI [1] AVX512 extension,
especially GF2P8AFFINEQB [2]. While the general idea seems to work, I have some questions
about my current implementation (see below). FTR, I have named this transformation
AffineCombineExpr (ACE).
2011 Jan 15
2
[LLVMdev] LLVM GC
Hi,
I've been implementing a compiler that targets LLVM, and was looking
into using the shadow-stack gc strategy. Currently, I build the runtime
with clang (using -emit-llvm), and then link that with the LLVM bitcode
output from my compiler using llvm-ld.
This works fine without the gc strategy annotations and use of the
llvm.gcroot intrinsic, but adding them causes some odd behavior: the
2016 Oct 14
2
LLVM/CLANG: CUDA compilation fail for inline assembly code
Hi,
I am sorry for sending this query again here, but maybe I sent it to wrong
list yesterday.
I am trying to compile LonestarGPU-rev2.0
<http://iss.ices.utexas.edu/?p=projects/galois/lonestargpu/download>
benchmark suite with LLVM/CLANG.
This suite has a following piece of code (more info here
<https://devtalk.nvidia.com/default/topic/481465/cuda-programming-and-performance/any-way-to-know-on-which-sm-a-thread-is-running-/2/?offset=21#4996171>
):
- static __device__...
2020 Jul 05
8
[RFC] carry-less multiplication instruction
...lar multiplication, by using holes to avoid carrys.</p><p>==Where is clmul used?==</p><p>While somewhat specialized, the RISC-V manual documents many uses: [2]</p><p>The classic applications forclmulare Cyclic Redundancy Check (CRC) [11, 26]</p><p>and Galois/CounterMode (GCM), but more applications exist, including the following examples.There are obvious applications in hashing and pseudo random number generations. For exam-ple, it has been reported that hashes based on carry-less multiplications can outperform Google’sCityHash [17].</p><p&g...
1999 May 14
2
Parallel printer error
...intcap entry:
lp10|10|laser4:\
:if=/usr/lbin/hplaserof:\
:of=/usr/lbin/hplaserof:\
:lf=/var/log/lpd/laser4err:\
:lp=/dev/lp0:\
:sd=/usr/spool/lp10:\
:mx#0:pl#66:pw#80:\
:xf=/usr/lbin/xf:
The smb.conf entry:
[gis9hp4p]
comment = LaserJet4 on galois
path = /eu_data2/samba/var/spool/laserjet
printer name = laser4
printer driver = HP LaserJet 4 Plus
; guest account = printguest
username = %M
read only = yes
printable = yes
guest ok = yes
create mask = 0777
print command = /usr/bin/lpr -Plaser4 -r -s %s
printing = sysv
--
D...
2020 Jul 09
2
[RFC] carry-less multiplication instruction
...multiplication, by using holes to avoid carrys.
>>
>> ==Where is clmul used?==
>>
>> While somewhat specialized, the RISC-V manual documents many uses: [2]
>>
>> The classic applications forclmulare Cyclic Redundancy Check (CRC) [11, 26]
>>
>> and Galois/CounterMode (GCM), but more applications exist, including the following examples.There are obvious applications in hashing and pseudo random number generations. For exam-ple, it has been reported that hashes based on carry-less multiplications can outperform Google’sCityHash [17].
>>
>>...
2020 Jul 09
2
[RFC] carry-less multiplication instruction
...ation, it can be lowered to regular multiplication, by using holes to avoid carrys.
>
> ==Where is clmul used?==
>
> While somewhat specialized, the RISC-V manual documents many uses: [2]
>
> The classic applications forclmulare Cyclic Redundancy Check (CRC) [11, 26]
>
> and Galois/CounterMode (GCM), but more applications exist, including the following examples.There are obvious applications in hashing and pseudo random number generations. For exam-ple, it has been reported that hashes based on carry-less multiplications can outperform Google’sCityHash [17].
>
> clmulo...
2012 Apr 18
3
Is there a way to find all roots of a polynomial equation in R?
Is there a way to find all roots of a polynomial equation?
Lets say
x^5+a*x^4+b*x^3+c*x^2+d*x+e=0
how to find its all roots?
[[alternative HTML version deleted]]
2013 Sep 06
3
X11partioning
Hi All,
I am searching for a way in X11 to "partition" or "divide" the screen.
For example the physical size of the screen may be 1920x1080
but what if I want 3 sections like
A
B C
where A is treated as a screen or division by itself,
then B and C the same way. Some subset of the screen.
So the application running in space A does not affect the
application B or C
2014 Feb 25
1
Any plans to support standardized authenticated encryption?
...- http://tinc-vpn.org/documentation/The-UDP-tunnel.html
Link 3 - http://tinc-vpn.org/documentation/Security.html
Have Tinc developers considered using a standardized authenticated
encryption algorithm, like GCM?
https://en.wikipedia.org/wiki/Authenticated_encryption
https://en.wikipedia.org/wiki/Galois/Counter_Mode
Thanks!
Parke
2015 Mar 19
4
[PATCH 8/9] qspinlock: Generic paravirt support
...h | 49 ++++++++++++
kernel/locking/qspinlock_paravirt.h | 143 ++++++++++++++++++++++++++++++++----
2 files changed, 178 insertions(+), 14 deletions(-)
--- /dev/null
+++ b/include/linux/lfsr.h
@@ -0,0 +1,49 @@
+#ifndef _LINUX_LFSR_H
+#define _LINUX_LFSR_H
+
+/*
+ * Simple Binary Galois Linear Feedback Shift Register
+ *
+ * http://en.wikipedia.org/wiki/Linear_feedback_shift_register
+ *
+ */
+
+extern void __lfsr_needs_more_taps(void);
+
+static __always_inline u32 lfsr_taps(int bits)
+{
+ if (bits == 1) return 0x0001;
+ if (bits == 2) return 0x0001;
+ if (bits == 3) return 0...