Displaying 3 results from an estimated 3 matches for "g_shl".
2018 Nov 12
3
[RFC] Tablegen-erated GlobalISel Combine Rules
...e on large rulesets or large functions.
>
> Okay, I see now where you're coming from, and the goal makes a lot of sense to me. I need some help with the syntax and semantics though :)
>
> First, just to clarify, the intention is for matchARMShiftedOp2 to match something like "G_SHL %X, ${imm}", right? Why not express that directly in MIR?
Going by http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/CIHBEAGE.html (which admittedly is old docs but it's unlikely to have changed), it needs to be able to match the following:
%0 = G_CONSTANT iN ${imm} #...
2018 Nov 10
3
[RFC] Tablegen-erated GlobalISel Combine Rules
Thanks Nicolai!
> On Nov 9, 2018, at 02:55, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>
> Hi Daniel,
>
> Lots of good stuff in there! I especially like the design for specifying out-of-line predicates. I have a couple of small comments and one major one below.
>
>
> On 09.11.18 02:42, Daniel Sanders via llvm-dev wrote:
>> _Passing arbitrary data from
2018 Sep 13
2
[GlobalISel][MIPS] Legality and instruction combining
Hello,
I am developing GlobalISel for MIPS. I have a few questions and observations about defining legality of generic instruction and also possible combining of instructions and artifacts in pre/post legalizer combiner or elsewhere (e.g. in some sort of instruction-select patterns).
I look at legality as "If generic instruction can be selected into machine instruction, it is legal".