search for: fxsave

IF guest CR0.wp is 0 and the destination address is ReadOnly, we have to emulate it. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Disheng Su <disheng.su.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch adds a number of fp instructions needed for OS/2 to boot as a HVM guest on Intel/VT hardware. It appears to work fine, and OS/2 is now finally working on Intel/VT as well as AMD/SVM. I''m a little concerned about the "correctness" of the FSTSW emulation and the use of inline assembly directly using the corresponding ops for emulation. Wrt FSTSW, it is really two ops

The first patch really isn''t as much of a follow-up than what triggered the security issues to be noticed in the first place. 1: x86: preserve FPU selectors for 32-bit guest code 2: x86: fix XCR0 handling 3: x86/xsave: adjust state management 4: x86/fxsave: bring in line with recent xsave adjustments The first two I would see as candidates for 4.3 (as well as subsequent backporting, albeit I realize that especially the first one is non-trivial), while the third is code improvement only, and the fourth is really just cleanup, and hence I''d b...

Some debugging tools don't like if a code uses unitialized variables. The code in cpu.c uses the value of fxsr.buff[50], so it makes sense to explicitely initialize it (because fxsave can fail to do it). -------------- next part -------------- A non-text attachment was scrubbed... Name: cpu_init_val.patch Type: application/octet-stream Size: 409 bytes Desc: not available Url : http://lists.xiph.org/pipermail/flac-dev/attachments/20151012/2f4eb2e0/attachment.obj

...ne, i have no patch for this part, because i don't like the current solution. kind regards peter ps.: there is a particular problem i couldn't solve, which does not matter as long as this file is not linked to an executable: gcc/config/i386/crtfastmath.c: line 104: asm volatile ("fxsave %0" : "=m" (fxsave) : "m" (fxsave)); the problem occurs during compilation of llvm-gcc4_2. llvm cannot handle the struct arguments at this level, the following errormsg is the result: cc1: .../llvm/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:2211: llvm::MVT::ValueTy...

Hi, This series integrate the processor.h header. There are a lot of things that are deeply architectural differences between architectures, but I've done my best to come to a settlement. With this series, I am very close to have selectable paravirt for x86_64, It applies ontop of today's x86 git, mm branch.

Hi, This series integrate the processor.h header. There are a lot of things that are deeply architectural differences between architectures, but I've done my best to come to a settlement. With this series, I am very close to have selectable paravirt for x86_64, It applies ontop of today's x86 git, mm branch.

...#39;m still using the following code before speex_encoder_init and erverything works great: // fix denormals performance issue // http://software.intel.com/en-us/articles/x87-and-sse-floating-point-assists-in-ia-32-flush-to-zero-ftz-and-denormals-are-zero-daz/ __m128 state[32]; __int32 temp; __asm fxsave state; memcpy(&temp, (char*)state + 24, 4); temp |= (1 << 11); // UNDERFLOW_EXCEPTION_MASK temp |= (1 << 15); // FTZ_BIT __asm ldmxcsr temp; Tested with Visual Studio 2010 on x86. Please let me know if it works for you too. Mark -- NEU: FreePhone 3-fach-Flat mit kostenlosem Smar...

Hi Andi, Here's a little batch of cleanups: - re-enable VDSO when PARAVIRT is enabled - make the parainstructions symbols match the other altinstructions naming convention - add kernel command-line options to disable altinstructions for smp and pv_ops Oh, and I'm mailing your noreplacement patch back at you, for no particularly good reason. J --

Hi Andi, Here's a little batch of cleanups: - re-enable VDSO when PARAVIRT is enabled - make the parainstructions symbols match the other altinstructions naming convention - add kernel command-line options to disable altinstructions for smp and pv_ops Oh, and I'm mailing your noreplacement patch back at you, for no particularly good reason. J --

...co-processor. As a result, the FPU contains the same debugging registers FOP, FIP, and FDP which store the opcode, instruction address, and data address of the instruction most recently executed by the FPU. On processors implementing the "SSE" instruction set, a new pair of instructions fxsave/fxrstor replaces the earlier fsave/frstor pair used for saving and restoring the FPU state. These new instructions also save and restore the contents of the additional registers used by SSE instructions. II. Problem Description On "7th generation" and "8th generation" proces...

...co-processor. As a result, the FPU contains the same debugging registers FOP, FIP, and FDP which store the opcode, instruction address, and data address of the instruction most recently executed by the FPU. On processors implementing the "SSE" instruction set, a new pair of instructions fxsave/fxrstor replaces the earlier fsave/frstor pair used for saving and restoring the FPU state. These new instructions also save and restore the contents of the additional registers used by SSE instructions. II. Problem Description On "7th generation" and "8th generation" proces...

...#39;m still using the following code before speex_encoder_init and erverything works great: // fix denormals performance issue // http://software.intel.com/en-us/articles/x87-and-sse-floating-point-assists-in-ia-32-flush-to-zero-ftz-and-denormals-are-zero-daz/ __m128 state[32]; __int32 temp; __asm fxsave state; memcpy(&temp, (char*)state + 24, 4); temp |= (1 << 11); // UNDERFLOW_EXCEPTION_MASK temp |= (1 << 15); // FTZ_BIT __asm ldmxcsr temp; Tested with Visual Studio 2010 on x86. Please let me know if it works for you too. Mark -- NEU: FreePhone 3-fach-Flat mit kostenlosem Smar...

...enabled in Jan 2009 in commit <http://git.xiph.org/?p=flac.git;a=commit;h=a832ef32fb2a888674659097f40c1f8efb72c1a4> According to the comment in cpu.c, "sigill_handler flavor resulted in several crash reports on win32". Also this sigill_handler flavor is not thread-safe. c) MinGW: fxsave/fxrestore vs. sigill_handler The code was added Mar 2014 in commit <http://git.xiph.org/?p=flac.git;a=commit;h=99d5154f436b389758d6a9020e448b8dbedb14bc> It's better to use FXSR flavor instead of sigill_handler flavor. The reasons are the same as for MSVC. -------------- next part -------...

Guys, I've been trying to install centos 6.2, then 6.3 onto a supermicro 6013P-8 which does not have a DVD rom drive. Those newer version of CentOS only have DVD (not CD) iso versions so I've been sharing the install via NFS. With each try the install hangs forever installing 'selinux-policy-targeted-3.7.19-154.el6.noarch'. How can I disable that feature and / or SE Linux

...clts(); */ /* ''clts'' is done for us by Xen during virtual trap. */ + /* NB. ''clts'' is done for us by Xen during virtual trap. */ + __get_cpu_var(xen_x86_cr0) &= ~X86_CR0_TS; if (!used_math()) init_fpu(me); restore_fpu_checking(&me->thread.i387.fxsave); --- a/include/asm-i386/mach-xen/asm/system.h +++ b/include/asm-i386/mach-xen/asm/system.h @@ -2,8 +2,10 @@ #define __ASM_SYSTEM_H #include <linux/kernel.h> +#include <linux/threads.h> #include <asm/segment.h> #include <asm/cpufeature.h> +#include <asm/percpu.h>...

Hi, Is the http://xenbits.xensource.com/linux-2.6-xen.hg tree still being updated? if not, what''s the preferred Linux tree to track that has all of the Xen bits? Thanks, Muli _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch removes the __init modifier from an extern function declaration in acpi.h. Besides not being strictly needed, it requires the inclusion of linux/init.h, which is usually not even included directly, increasing header mess by a lot. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> --- include/asm-x86/acpi.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

This patch removes the __init modifier from an extern function declaration in acpi.h. Besides not being strictly needed, it requires the inclusion of linux/init.h, which is usually not even included directly, increasing header mess by a lot. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> --- include/asm-x86/acpi.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

...ation of macro that returns current @@ -275,7 +287,11 @@ union i387_union { struct i387_soft_struct soft; }; -# include "processor_32.h" +/* + * the following now lives in the per cpu area: + * extern int cpu_llc_id[NR_CPUS]; + */ +DECLARE_PER_CPU(u8, cpu_llc_id); #else struct i387_fxsave_struct { u16 cwd; @@ -295,7 +311,7 @@ union i387_union { struct i387_fxsave_struct fxsave; }; -# include "processor_64.h" +DECLARE_PER_CPU(struct orig_ist, orig_ist); #endif extern void print_cpu_info(struct cpuinfo_x86 *); @@ -778,6 +794,124 @@ static inline void prefetchw(con...