search for: fxch

All, in the light of erratum #573 I''m wondering if we need to tweak or conditionally suppress fsincos emulation. The question is whether there is any possibility for getting the emulator to hit this instruction on AMD (as no real mode emulation ought to be taking place there), i.e. whether there are places where emulation gets continued eagerly in anticipation of the need for emulation

Dear guys, what is the best way to implement a swap of floating point registers in X86? For the integer registers, I am using xchg. Is there a similar instruction for floating point? My function to insert swaps is like: void X86RegisterInfo::swapRegs( MachineBasicBlock & mbb, MachineBasicBlock::iterator mi, unsigned r1, unsigned r2, const TargetRegisterClass

On 7/3/07, Fernando Magno Quintao Pereira <fernando at cs.ucla.edu> wrote: > > what is the best way to implement a swap of floating point registers > in X86? For the integer registers, I am using xchg. Is there a similar > instruction for floating point? FXCH swaps stN with st0, but you'd have to use memory for arbitrary swaps I believe. I have no idea if it's the "best" though. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20070703/a30febcb/atta...

Jean-Marc Valin wrote: >If you set the denoiser to "on" and the VAD to "off", what difference >does it make in CPU time? > <p>Same program, running on Athlon XP 1700+: Test 1, using VAD, but AGC, denoise off: tevek@canarsie:~/work/hms/app_conference $ time ./vad_test /tmp/demo-instruct.sw 5 reading from /tmp/demo-instruct.sw, repeating 5 times read 537760

...or the time of release, etc. Second question: I am trying to implement swaps of floating point registers, but I do not know how to do it. I am basically trying something like: // r1 and r2 are unsigned of either class X86::FR32RegClass // or X86::FR64RegClass unsigned Opc = X86::FXCH; BuildMI(mbb, mi, Opc, 1).addReg(r1); BuildMI(mbb, mi, Opc, 1).addReg(r2); BuildMI(mbb, mi, Opc, 1).addReg(r1); This produces code like: "fxch %xmm0", that gcc does not compile. Could some generous soul shed some light on my misery? best, Fernando

...mple example to demonstrate this. For example, go into llvm-test/MultiSource/Benchmarks/Olden and run: $ make TEST=jit report This should spit out something like this (on X86): Name: | Total CodeGen InstSel LiveVar RA FPStack Peep | MCSize #MCInsts #Glob | #store #load #fp #fxch | treeadd/treeadd | 6.38 0.0300 0.0133 0.0023 0.0054 0.0001 0.0002 | 1000 245 115 | * 10 * * | power/power | 4.87 0.0899 0.0368 0.0044 0.0366 0.0022 0.0003 | 5720 1336 702 | 105 216 790 58 | tsp/tsp | 4.72 0.1400 0.0439 0.0...

Hello , I am compiling SPEC 2000 benchmarks with llvm .Got stuck with calculating "execution time" of all the .bc and native files. The log for nightly test itself gives execution times but I am passing the bytecode files to my pass which gives another bytecode file.I have to calculate execution time of such bytecode and native files as well.If i simply do this: time lli

....jit.report) are a simple example to demonstrate this. For example, go into llvm-test/MultiSource/Benchmarks/Olden and run: $ make TEST=jit report This should spit out something like this (on X86): Name: | Total CodeGen InstSel LiveVar RA FPStack Peep | MCSize #MCInsts #Glob | #store #load #fp #fxch | treeadd/treeadd | 6.38 0.0300 0.0133 0.0023 0.0054 0.0001 0.0002 | 1000 245 115 | * 10 * * | power/power | 4.87 0.0899 0.0368 0.0044 0.0366 0.0022 0.0003 | 5720 1336 702 | 105 216 790 58 | tsp/tsp | 4.72 0.1400 0.0439 0.0073 0.0591 0.0023 0.0005 | 4463 1128 106 | 62 149 469 28 | bh/bh | 3.09 0.27...

...h functions; specifically, they interfere with GCC's FPU stack allocation and result in stack overflows. If you're curious about your glibc 2.1, look at /usr/include/bit/mathinline.h and search for 'log10'. The correct line should read: __inline_mathop_decl (log10, "fldlg2; fxch; fyl2x", "0" (__x) : "st(1)") If your version is missing the "st(1)" at the end, YOU WILL NOT BE ABLE TO BUILD A WORKING LIBVORBIS. Not only that, but anything you've ever built on your machine that uses rint(), log(), log10(), exp(), etc, stands a good chan...

...h functions; specifically, they interfere with GCC's FPU stack allocation and result in stack overflows. If you're curious about your glibc 2.1, look at /usr/include/bit/mathinline.h and search for 'log10'. The correct line should read: __inline_mathop_decl (log10, "fldlg2; fxch; fyl2x", "0" (__x) : "st(1)") If your version is missing the "st(1)" at the end, YOU WILL NOT BE ABLE TO BUILD A WORKING LIBVORBIS. Not only that, but anything you've ever built on your machine that uses rint(), log(), log10(), exp(), etc, stands a good chan...

...I0_0: .long 3204448256 # float -0.5 .text .globl main .align 16, 0x90 .type main, at function main: # @main .cfi_startproc # BB#0: fldl g fmuls .LCPI0_0 fldz fchs fxch %st(1) fucompp fnstsw %ax # kill: AX<def> AX<kill> EAX<def> # kill: AH<def> AH<kill> EAX<kill> sahf sete %al movzbl %al, %eax r...

Some wheird problem, Target/X86 builds okay now. But there seems to be another problem with the Cygwin build :- make[4]: Entering directory `/usr/build/llvm/lib/Target/SparcV9/ModuloScheduling' llvm[4]: Compiling ModuloSchedulingSuperBlock.cpp for Debug build /usr/src/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp : In member function `virtual bool

...00000 41100000 7b5dc574 0080e20a 0x7b5dc340: 00000020 0080edf8 071d1d2c 00000000 0x7b5dc350: 09089418 0000bb80 00000002 40a4fbff 0x7b5dc360: 0045326d 000001e0 0045326d 000008cd Backtrace: =>1 0x0083c976 in wow (+0x43c976) (0x7b5dc338) 2 0x0080e20a in wow (+0x40e20a) (0x7b5dc574) 0x0083c976: fxch %st(2) Modules: Module Address Debug info Name (101 modules) PE 400000- ec8000 Export wow PE 33e0000- 3453000 Deferred haa146.tmp PE 10000000-10069000 Deferred divxdecoder ELF 7b800000-7b92d000 Deferred kernel32<elf> \-PE 7b820000-7b92d000 \...

Here's what's left on Linux (GCC 4.1.0), after all updates that went into the branch: Running /proj/llvm/build/../llvm/test/Regression/CFrontend/dg.exp ... FAIL: /proj/llvm/build/../llvm/test/Regression/CFrontend/2004-02-12- LargeAggregateCopy.c.tr: gccas: /proj/llvm/build/../llvm/lib/VMCore/Function.cpp:266: unsigned int llvm::Function::getIntrinsicID() const: Assertion `0 &&